Lines Matching refs:clk
552 struct exynos5_clock *clk = in exynos5250_system_clock_init() local
561 clrbits_le32(&clk->src_cpu, MUX_APLL_SEL_MASK); in exynos5250_system_clock_init()
563 val = readl(&clk->mux_stat_cpu); in exynos5250_system_clock_init()
566 clrbits_le32(&clk->src_core1, MUX_MPLL_SEL_MASK); in exynos5250_system_clock_init()
568 val = readl(&clk->mux_stat_core1); in exynos5250_system_clock_init()
571 clrbits_le32(&clk->src_top2, MUX_CPLL_SEL_MASK); in exynos5250_system_clock_init()
572 clrbits_le32(&clk->src_top2, MUX_EPLL_SEL_MASK); in exynos5250_system_clock_init()
573 clrbits_le32(&clk->src_top2, MUX_VPLL_SEL_MASK); in exynos5250_system_clock_init()
574 clrbits_le32(&clk->src_top2, MUX_GPLL_SEL_MASK); in exynos5250_system_clock_init()
578 val = readl(&clk->mux_stat_top2); in exynos5250_system_clock_init()
581 clrbits_le32(&clk->src_cdrex, MUX_BPLL_SEL_MASK); in exynos5250_system_clock_init()
583 val = readl(&clk->mux_stat_cdrex); in exynos5250_system_clock_init()
587 writel(mem->apll_pdiv * PLL_LOCK_FACTOR, &clk->apll_lock); in exynos5250_system_clock_init()
588 writel(mem->mpll_pdiv * PLL_LOCK_FACTOR, &clk->mpll_lock); in exynos5250_system_clock_init()
589 writel(mem->bpll_pdiv * PLL_LOCK_FACTOR, &clk->bpll_lock); in exynos5250_system_clock_init()
590 writel(mem->cpll_pdiv * PLL_LOCK_FACTOR, &clk->cpll_lock); in exynos5250_system_clock_init()
591 writel(mem->gpll_pdiv * PLL_X_LOCK_FACTOR, &clk->gpll_lock); in exynos5250_system_clock_init()
592 writel(mem->epll_pdiv * PLL_X_LOCK_FACTOR, &clk->epll_lock); in exynos5250_system_clock_init()
593 writel(mem->vpll_pdiv * PLL_X_LOCK_FACTOR, &clk->vpll_lock); in exynos5250_system_clock_init()
595 writel(CLK_REG_DISABLE, &clk->pll_div2_sel); in exynos5250_system_clock_init()
597 writel(MUX_HPM_SEL_MASK, &clk->src_cpu); in exynos5250_system_clock_init()
599 val = readl(&clk->mux_stat_cpu); in exynos5250_system_clock_init()
610 writel(val, &clk->div_cpu0); in exynos5250_system_clock_init()
612 val = readl(&clk->div_stat_cpu0); in exynos5250_system_clock_init()
615 writel(CLK_DIV_CPU1_VAL, &clk->div_cpu1); in exynos5250_system_clock_init()
617 val = readl(&clk->div_stat_cpu1); in exynos5250_system_clock_init()
621 writel(APLL_CON1_VAL, &clk->apll_con1); in exynos5250_system_clock_init()
624 writel(val, &clk->apll_con0); in exynos5250_system_clock_init()
625 while ((readl(&clk->apll_con0) & APLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
629 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5250_system_clock_init()
631 writel(val, &clk->mpll_con0); in exynos5250_system_clock_init()
632 while ((readl(&clk->mpll_con0) & MPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
636 writel(BPLL_CON1_VAL, &clk->bpll_con1); in exynos5250_system_clock_init()
638 writel(val, &clk->bpll_con0); in exynos5250_system_clock_init()
639 while ((readl(&clk->bpll_con0) & BPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
643 writel(CPLL_CON1_VAL, &clk->cpll_con1); in exynos5250_system_clock_init()
645 writel(val, &clk->cpll_con0); in exynos5250_system_clock_init()
646 while ((readl(&clk->cpll_con0) & CPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
650 writel(GPLL_CON1_VAL, &clk->gpll_con1); in exynos5250_system_clock_init()
652 writel(val, &clk->gpll_con0); in exynos5250_system_clock_init()
653 while ((readl(&clk->gpll_con0) & GPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
657 writel(EPLL_CON2_VAL, &clk->epll_con2); in exynos5250_system_clock_init()
658 writel(EPLL_CON1_VAL, &clk->epll_con1); in exynos5250_system_clock_init()
660 writel(val, &clk->epll_con0); in exynos5250_system_clock_init()
661 while ((readl(&clk->epll_con0) & EPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
665 writel(VPLL_CON2_VAL, &clk->vpll_con2); in exynos5250_system_clock_init()
666 writel(VPLL_CON1_VAL, &clk->vpll_con1); in exynos5250_system_clock_init()
668 writel(val, &clk->vpll_con0); in exynos5250_system_clock_init()
669 while ((readl(&clk->vpll_con0) & VPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
672 writel(CLK_SRC_CORE0_VAL, &clk->src_core0); in exynos5250_system_clock_init()
673 writel(CLK_DIV_CORE0_VAL, &clk->div_core0); in exynos5250_system_clock_init()
674 while (readl(&clk->div_stat_core0) != 0) in exynos5250_system_clock_init()
677 writel(CLK_DIV_CORE1_VAL, &clk->div_core1); in exynos5250_system_clock_init()
678 while (readl(&clk->div_stat_core1) != 0) in exynos5250_system_clock_init()
681 writel(CLK_DIV_SYSRGT_VAL, &clk->div_sysrgt); in exynos5250_system_clock_init()
682 while (readl(&clk->div_stat_sysrgt) != 0) in exynos5250_system_clock_init()
685 writel(CLK_DIV_ACP_VAL, &clk->div_acp); in exynos5250_system_clock_init()
686 while (readl(&clk->div_stat_acp) != 0) in exynos5250_system_clock_init()
689 writel(CLK_DIV_SYSLFT_VAL, &clk->div_syslft); in exynos5250_system_clock_init()
690 while (readl(&clk->div_stat_syslft) != 0) in exynos5250_system_clock_init()
693 writel(CLK_SRC_TOP0_VAL, &clk->src_top0); in exynos5250_system_clock_init()
694 writel(CLK_SRC_TOP1_VAL, &clk->src_top1); in exynos5250_system_clock_init()
695 writel(TOP2_VAL, &clk->src_top2); in exynos5250_system_clock_init()
696 writel(CLK_SRC_TOP3_VAL, &clk->src_top3); in exynos5250_system_clock_init()
698 writel(CLK_DIV_TOP0_VAL, &clk->div_top0); in exynos5250_system_clock_init()
699 while (readl(&clk->div_stat_top0)) in exynos5250_system_clock_init()
702 writel(CLK_DIV_TOP1_VAL, &clk->div_top1); in exynos5250_system_clock_init()
703 while (readl(&clk->div_stat_top1)) in exynos5250_system_clock_init()
706 writel(CLK_SRC_LEX_VAL, &clk->src_lex); in exynos5250_system_clock_init()
708 val = readl(&clk->mux_stat_lex); in exynos5250_system_clock_init()
713 writel(CLK_DIV_LEX_VAL, &clk->div_lex); in exynos5250_system_clock_init()
714 while (readl(&clk->div_stat_lex)) in exynos5250_system_clock_init()
717 writel(CLK_DIV_R0X_VAL, &clk->div_r0x); in exynos5250_system_clock_init()
718 while (readl(&clk->div_stat_r0x)) in exynos5250_system_clock_init()
721 writel(CLK_DIV_R0X_VAL, &clk->div_r0x); in exynos5250_system_clock_init()
722 while (readl(&clk->div_stat_r0x)) in exynos5250_system_clock_init()
725 writel(CLK_DIV_R1X_VAL, &clk->div_r1x); in exynos5250_system_clock_init()
726 while (readl(&clk->div_stat_r1x)) in exynos5250_system_clock_init()
729 writel(CLK_REG_DISABLE, &clk->src_cdrex); in exynos5250_system_clock_init()
731 writel(CLK_DIV_CDREX_VAL, &clk->div_cdrex); in exynos5250_system_clock_init()
732 while (readl(&clk->div_stat_cdrex)) in exynos5250_system_clock_init()
735 val = readl(&clk->src_cpu); in exynos5250_system_clock_init()
737 writel(val, &clk->src_cpu); in exynos5250_system_clock_init()
739 val = readl(&clk->src_top2); in exynos5250_system_clock_init()
741 writel(val, &clk->src_top2); in exynos5250_system_clock_init()
743 val = readl(&clk->src_core1); in exynos5250_system_clock_init()
745 writel(val, &clk->src_core1); in exynos5250_system_clock_init()
747 writel(CLK_SRC_FSYS0_VAL, &clk->src_fsys); in exynos5250_system_clock_init()
748 writel(CLK_DIV_FSYS0_VAL, &clk->div_fsys0); in exynos5250_system_clock_init()
749 while (readl(&clk->div_stat_fsys0)) in exynos5250_system_clock_init()
752 writel(CLK_REG_DISABLE, &clk->clkout_cmu_cpu); in exynos5250_system_clock_init()
753 writel(CLK_REG_DISABLE, &clk->clkout_cmu_core); in exynos5250_system_clock_init()
754 writel(CLK_REG_DISABLE, &clk->clkout_cmu_acp); in exynos5250_system_clock_init()
755 writel(CLK_REG_DISABLE, &clk->clkout_cmu_top); in exynos5250_system_clock_init()
756 writel(CLK_REG_DISABLE, &clk->clkout_cmu_lex); in exynos5250_system_clock_init()
757 writel(CLK_REG_DISABLE, &clk->clkout_cmu_r0x); in exynos5250_system_clock_init()
758 writel(CLK_REG_DISABLE, &clk->clkout_cmu_r1x); in exynos5250_system_clock_init()
759 writel(CLK_REG_DISABLE, &clk->clkout_cmu_cdrex); in exynos5250_system_clock_init()
761 writel(CLK_SRC_PERIC0_VAL, &clk->src_peric0); in exynos5250_system_clock_init()
762 writel(CLK_DIV_PERIC0_VAL, &clk->div_peric0); in exynos5250_system_clock_init()
764 writel(CLK_SRC_PERIC1_VAL, &clk->src_peric1); in exynos5250_system_clock_init()
765 writel(CLK_DIV_PERIC1_VAL, &clk->div_peric1); in exynos5250_system_clock_init()
766 writel(CLK_DIV_PERIC2_VAL, &clk->div_peric2); in exynos5250_system_clock_init()
767 writel(CLK_DIV_PERIC3_VAL, &clk->div_peric3); in exynos5250_system_clock_init()
769 writel(SCLK_SRC_ISP_VAL, &clk->sclk_src_isp); in exynos5250_system_clock_init()
770 writel(SCLK_DIV_ISP_VAL, &clk->sclk_div_isp); in exynos5250_system_clock_init()
771 writel(CLK_DIV_ISP0_VAL, &clk->div_isp0); in exynos5250_system_clock_init()
772 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5250_system_clock_init()
773 writel(CLK_DIV_ISP2_VAL, &clk->div_isp2); in exynos5250_system_clock_init()
776 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp1_0); in exynos5250_system_clock_init()
782 writel(val, &clk->div_fsys2); in exynos5250_system_clock_init()
787 struct exynos5420_clock *clk = in exynos5420_system_clock_init() local
797 writel(arm_clk_ratio->apll_pdiv * PLL_LOCK_FACTOR, &clk->apll_lock); in exynos5420_system_clock_init()
798 writel(mem->mpll_pdiv * PLL_LOCK_FACTOR, &clk->mpll_lock); in exynos5420_system_clock_init()
799 writel(mem->bpll_pdiv * PLL_LOCK_FACTOR, &clk->bpll_lock); in exynos5420_system_clock_init()
800 writel(mem->cpll_pdiv * PLL_LOCK_FACTOR, &clk->cpll_lock); in exynos5420_system_clock_init()
801 writel(mem->dpll_pdiv * PLL_LOCK_FACTOR, &clk->dpll_lock); in exynos5420_system_clock_init()
802 writel(mem->epll_pdiv * PLL_X_LOCK_FACTOR, &clk->epll_lock); in exynos5420_system_clock_init()
803 writel(mem->vpll_pdiv * PLL_LOCK_FACTOR, &clk->vpll_lock); in exynos5420_system_clock_init()
804 writel(mem->ipll_pdiv * PLL_LOCK_FACTOR, &clk->ipll_lock); in exynos5420_system_clock_init()
805 writel(mem->spll_pdiv * PLL_LOCK_FACTOR, &clk->spll_lock); in exynos5420_system_clock_init()
806 writel(mem->kpll_pdiv * PLL_LOCK_FACTOR, &clk->kpll_lock); in exynos5420_system_clock_init()
807 writel(mem->rpll_pdiv * PLL_X_LOCK_FACTOR, &clk->rpll_lock); in exynos5420_system_clock_init()
809 setbits_le32(&clk->src_cpu, MUX_HPM_SEL_MASK); in exynos5420_system_clock_init()
811 writel(0, &clk->src_top6); in exynos5420_system_clock_init()
813 writel(0, &clk->src_cdrex); in exynos5420_system_clock_init()
814 writel(SRC_KFC_HPM_SEL, &clk->src_kfc); in exynos5420_system_clock_init()
815 writel(HPM_RATIO, &clk->div_cpu1); in exynos5420_system_clock_init()
816 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0); in exynos5420_system_clock_init()
819 clrbits_le32(&clk->src_cpu, APLL_FOUT); in exynos5420_system_clock_init()
822 writel(APLL_CON1_VAL, &clk->apll_con1); in exynos5420_system_clock_init()
826 writel(val, &clk->apll_con0); in exynos5420_system_clock_init()
827 while ((readl(&clk->apll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
831 setbits_le32(&clk->src_cpu, APLL_FOUT); in exynos5420_system_clock_init()
833 writel(SRC_KFC_HPM_SEL, &clk->src_kfc); in exynos5420_system_clock_init()
834 writel(CLK_DIV_KFC_VAL, &clk->div_kfc0); in exynos5420_system_clock_init()
837 clrbits_le32(&clk->src_kfc, KPLL_FOUT); in exynos5420_system_clock_init()
840 writel(KPLL_CON1_VAL, &clk->kpll_con1); in exynos5420_system_clock_init()
842 writel(val, &clk->kpll_con0); in exynos5420_system_clock_init()
843 while ((readl(&clk->kpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
847 setbits_le32(&clk->src_kfc, KPLL_FOUT); in exynos5420_system_clock_init()
850 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5420_system_clock_init()
852 writel(val, &clk->mpll_con0); in exynos5420_system_clock_init()
853 while ((readl(&clk->mpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
857 writel(DPLL_CON1_VAL, &clk->dpll_con1); in exynos5420_system_clock_init()
859 writel(val, &clk->dpll_con0); in exynos5420_system_clock_init()
860 while ((readl(&clk->dpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
864 writel(EPLL_CON2_VAL, &clk->epll_con2); in exynos5420_system_clock_init()
865 writel(EPLL_CON1_VAL, &clk->epll_con1); in exynos5420_system_clock_init()
867 writel(val, &clk->epll_con0); in exynos5420_system_clock_init()
868 while ((readl(&clk->epll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
872 writel(CPLL_CON1_VAL, &clk->cpll_con1); in exynos5420_system_clock_init()
874 writel(val, &clk->cpll_con0); in exynos5420_system_clock_init()
875 while ((readl(&clk->cpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
879 writel(IPLL_CON1_VAL, &clk->ipll_con1); in exynos5420_system_clock_init()
881 writel(val, &clk->ipll_con0); in exynos5420_system_clock_init()
882 while ((readl(&clk->ipll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
886 writel(VPLL_CON1_VAL, &clk->vpll_con1); in exynos5420_system_clock_init()
888 writel(val, &clk->vpll_con0); in exynos5420_system_clock_init()
889 while ((readl(&clk->vpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
893 writel(BPLL_CON1_VAL, &clk->bpll_con1); in exynos5420_system_clock_init()
895 writel(val, &clk->bpll_con0); in exynos5420_system_clock_init()
896 while ((readl(&clk->bpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
900 writel(SPLL_CON1_VAL, &clk->spll_con1); in exynos5420_system_clock_init()
902 writel(val, &clk->spll_con0); in exynos5420_system_clock_init()
903 while ((readl(&clk->spll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
907 writel(RPLL_CON2_VAL, &clk->rpll_con2); in exynos5420_system_clock_init()
908 writel(RPLL_CON1_VAL, &clk->rpll_con1); in exynos5420_system_clock_init()
910 writel(val, &clk->rpll_con0); in exynos5420_system_clock_init()
911 while ((readl(&clk->rpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
914 writel(CLK_DIV_CDREX0_VAL, &clk->div_cdrex0); in exynos5420_system_clock_init()
915 writel(CLK_DIV_CDREX1_VAL, &clk->div_cdrex1); in exynos5420_system_clock_init()
917 writel(CLK_SRC_TOP0_VAL, &clk->src_top0); in exynos5420_system_clock_init()
918 writel(CLK_SRC_TOP1_VAL, &clk->src_top1); in exynos5420_system_clock_init()
919 writel(CLK_SRC_TOP2_VAL, &clk->src_top2); in exynos5420_system_clock_init()
920 writel(CLK_SRC_TOP7_VAL, &clk->src_top7); in exynos5420_system_clock_init()
922 writel(CLK_DIV_TOP0_VAL, &clk->div_top0); in exynos5420_system_clock_init()
923 writel(CLK_DIV_TOP1_VAL, &clk->div_top1); in exynos5420_system_clock_init()
924 writel(CLK_DIV_TOP2_VAL, &clk->div_top2); in exynos5420_system_clock_init()
926 writel(0, &clk->src_top10); in exynos5420_system_clock_init()
927 writel(0, &clk->src_top11); in exynos5420_system_clock_init()
928 writel(0, &clk->src_top12); in exynos5420_system_clock_init()
930 writel(CLK_SRC_TOP3_VAL, &clk->src_top3); in exynos5420_system_clock_init()
931 writel(CLK_SRC_TOP4_VAL, &clk->src_top4); in exynos5420_system_clock_init()
932 writel(CLK_SRC_TOP5_VAL, &clk->src_top5); in exynos5420_system_clock_init()
935 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp10); in exynos5420_system_clock_init()
936 writel(CLK_DIV_DISP1_0_VAL, &clk->div_disp10); in exynos5420_system_clock_init()
939 writel(AUDIO0_SEL_EPLL, &clk->src_mau); in exynos5420_system_clock_init()
940 writel(DIV_MAU_VAL, &clk->div_mau); in exynos5420_system_clock_init()
943 writel(CLK_SRC_FSYS0_VAL, &clk->src_fsys); in exynos5420_system_clock_init()
944 writel(CLK_DIV_FSYS0_VAL, &clk->div_fsys0); in exynos5420_system_clock_init()
945 writel(CLK_DIV_FSYS1_VAL, &clk->div_fsys1); in exynos5420_system_clock_init()
946 writel(CLK_DIV_FSYS2_VAL, &clk->div_fsys2); in exynos5420_system_clock_init()
948 writel(CLK_SRC_ISP_VAL, &clk->src_isp); in exynos5420_system_clock_init()
949 writel(CLK_DIV_ISP0_VAL, &clk->div_isp0); in exynos5420_system_clock_init()
950 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5420_system_clock_init()
952 writel(CLK_SRC_PERIC0_VAL, &clk->src_peric0); in exynos5420_system_clock_init()
953 writel(CLK_SRC_PERIC1_VAL, &clk->src_peric1); in exynos5420_system_clock_init()
955 writel(CLK_DIV_PERIC0_VAL, &clk->div_peric0); in exynos5420_system_clock_init()
956 writel(CLK_DIV_PERIC1_VAL, &clk->div_peric1); in exynos5420_system_clock_init()
957 writel(CLK_DIV_PERIC2_VAL, &clk->div_peric2); in exynos5420_system_clock_init()
958 writel(CLK_DIV_PERIC3_VAL, &clk->div_peric3); in exynos5420_system_clock_init()
959 writel(CLK_DIV_PERIC4_VAL, &clk->div_peric4); in exynos5420_system_clock_init()
961 writel(CLK_DIV_CPERI1_VAL, &clk->div_cperi1); in exynos5420_system_clock_init()
963 writel(CLK_DIV2_RATIO, &clk->clkdiv2_ratio); in exynos5420_system_clock_init()
964 writel(CLK_DIV4_RATIO, &clk->clkdiv4_ratio); in exynos5420_system_clock_init()
965 writel(CLK_DIV_G2D, &clk->div_g2d); in exynos5420_system_clock_init()
967 writel(CLK_SRC_TOP6_VAL, &clk->src_top6); in exynos5420_system_clock_init()
968 writel(CLK_SRC_CDREX_VAL, &clk->src_cdrex); in exynos5420_system_clock_init()
969 writel(CLK_SRC_KFC_VAL, &clk->src_kfc); in exynos5420_system_clock_init()
982 struct exynos5_clock *clk = in clock_init_dp_clock() local
986 setbits_le32(&clk->gate_ip_disp1, CLK_GATE_DP1_ALLOW); in clock_init_dp_clock()
989 setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); in clock_init_dp_clock()
998 struct exynos5_clock *clk = in emmc_boot_clk_div_set() local
1002 div_mmc = readl((unsigned int) &clk->div_fsys1) & ~FSYS1_MMC0_DIV_MASK; in emmc_boot_clk_div_set()
1004 writel(div_mmc, (unsigned int) &clk->div_fsys1); in emmc_boot_clk_div_set()