117 	unsigned int div;  in exynos_get_pll_clk()  local
159 			div = PLL_DIV_1024;  in exynos_get_pll_clk()
161 			div = PLL_DIV_65535;  in exynos_get_pll_clk()
164 			div = PLL_DIV_65536;  in exynos_get_pll_clk()
168 		fout = (m + k / div) * (freq / (p * (1 << s)));  in exynos_get_pll_clk()
369 	unsigned int src = 0, div = 0, sub_div = 0;  in exynos5_get_periph_rate()  local
379 		div = readl(&clk->div_peric0);  in exynos5_get_periph_rate()
387 		div = readl(&clk->div_peric3);  in exynos5_get_periph_rate()
391 		div = sub_div = readl(&clk->div_mau);  in exynos5_get_periph_rate()
395 		div = sub_div = readl(&clk->div_peric1);  in exynos5_get_periph_rate()
399 		div = sub_div = readl(&clk->div_peric2);  in exynos5_get_periph_rate()
404 		div = sub_div = readl(&clk->sclk_div_isp);  in exynos5_get_periph_rate()
409 		div = sub_div = readl(&clk->div_fsys1);  in exynos5_get_periph_rate()
414 		div = sub_div = readl(&clk->div_fsys2);  in exynos5_get_periph_rate()
425 		div = readl(&clk->div_top1);  in exynos5_get_periph_rate()
453 		div = (div >> bit_info->div_bit) & bit_info->div_mask;  in exynos5_get_periph_rate()
461 	return (sclk / (div + 1)) / (sub_div + 1);  in exynos5_get_periph_rate()
468 	unsigned int src = 0, div = 0, sub_div = 0;  in exynos542x_get_periph_rate()  local
483 		div = readl(&clk->div_peric0);  in exynos542x_get_periph_rate()
489 		div = readl(&clk->div_peric1);  in exynos542x_get_periph_rate()
495 		div = readl(&clk->div_isp1);  in exynos542x_get_periph_rate()
503 		div = readl(&clk->div_fsys1);  in exynos542x_get_periph_rate()
517 		div = readl(&clk->div_top1);  in exynos542x_get_periph_rate()
547 		div = (div >> bit_info->div_bit) & bit_info->div_mask;  in exynos542x_get_periph_rate()
555 	return (sclk / (div + 1)) / (sub_div + 1);  in exynos542x_get_periph_rate()
574 	unsigned long div;  in exynos4_get_arm_clk()  local
579 	div = readl(&clk->div_cpu0);  in exynos4_get_arm_clk()
582 	core_ratio = (div >> 0) & 0x7;  in exynos4_get_arm_clk()
583 	core2_ratio = (div >> 28) & 0x7;  in exynos4_get_arm_clk()
596 	unsigned long div;  in exynos4x12_get_arm_clk()  local
601 	div = readl(&clk->div_cpu0);  in exynos4x12_get_arm_clk()
604 	core_ratio = (div >> 0) & 0x7;  in exynos4x12_get_arm_clk()
605 	core2_ratio = (div >> 28) & 0x7;  in exynos4x12_get_arm_clk()
618 	unsigned long div;  in exynos5_get_arm_clk()  local
623 	div = readl(&clk->div_cpu0);  in exynos5_get_arm_clk()
626 	arm_ratio = (div >> 0) & 0x7;  in exynos5_get_arm_clk()
627 	arm2_ratio = (div >> 28) & 0x7;  in exynos5_get_arm_clk()
834 static void exynos4_set_mmc_clk(int dev_index, unsigned int div)  in exynos4_set_mmc_clk()  argument
851 		set_bit = SET_PRE_RATIO(dev_index, div);  in exynos4_set_mmc_clk()
857 		set_bit = SET_RATIO(dev_index, div);  in exynos4_set_mmc_clk()
862 		set_bit = SET_PRE_RATIO(dev_index, div);  in exynos4_set_mmc_clk()
869 static void exynos5_set_mmc_clk(int dev_index, unsigned int div)  in exynos5_set_mmc_clk()  argument
889 			(div & 0xff) << ((dev_index << 4) + 8));  in exynos5_set_mmc_clk()
893 static void exynos5420_set_mmc_clk(int dev_index, unsigned int div)  in exynos5420_set_mmc_clk()  argument
909 	clrsetbits_le32(addr, 0x3ff << shift, (div & 0x3ff) << shift);  in exynos5420_set_mmc_clk()
1347 	unsigned int div;  in exynos5_set_i2s_clk_prescaler()  local
1355 	div = (src_frq / dst_frq);  in exynos5_set_i2s_clk_prescaler()
1357 		if (div > AUDIO_0_RATIO_MASK) {  in exynos5_set_i2s_clk_prescaler()
1364 				(div & AUDIO_0_RATIO_MASK));  in exynos5_set_i2s_clk_prescaler()
1366 		if (div > AUDIO_1_RATIO_MASK) {  in exynos5_set_i2s_clk_prescaler()
1373 				(div & AUDIO_1_RATIO_MASK));  in exynos5_set_i2s_clk_prescaler()
1688 void set_mmc_clk(int dev_index, unsigned int div)  in set_mmc_clk()  argument
1691 	if (div > 0)  in set_mmc_clk()
1692 		div -= 1;  in set_mmc_clk()
1696 			exynos5420_set_mmc_clk(dev_index, div);  in set_mmc_clk()
1698 			exynos5_set_mmc_clk(dev_index, div);  in set_mmc_clk()
1700 		exynos4_set_mmc_clk(dev_index, div);  in set_mmc_clk()