Lines Matching refs:dv_sys_module_regs
93 while (!((readl(&dv_sys_module_regs->pll0_config) & PLL0_LOCK) in dm365_pll1_init()
168 while (!((readl(&dv_sys_module_regs->pll1_config) & PLL1_LOCK) in dm365_pll2_init()
179 &dv_sys_module_regs->peri_clkctl); in dm365_pll2_init()
187 clrbits_le32(&dv_sys_module_regs->vtpiocr, in dm365_ddr_setup()
191 setbits_le32(&dv_sys_module_regs->vtpiocr, VPTIO_CLRZ); in dm365_ddr_setup()
194 while (!(readl(&dv_sys_module_regs->vtpiocr) & VPTIO_RDY)) in dm365_ddr_setup()
198 setbits_le32(&dv_sys_module_regs->vtpiocr, VPTIO_IOPWRDN); in dm365_ddr_setup()
201 setbits_le32(&dv_sys_module_regs->vtpiocr, VPTIO_LOCK); in dm365_ddr_setup()
207 setbits_le32(&dv_sys_module_regs->vtpiocr, in dm365_ddr_setup()
248 setbits_le32(&dv_sys_module_regs->vpss_clkctl, in dm365_vpss_sync_reset()
307 clrbits_le32(&dv_sys_module_regs->vpss_clkctl, in dm365_wdt_flag_on()
377 clrbits_le32(&dv_sys_module_regs->pinmux[offset], mask); in dm365_pinmux_ctl()
378 setbits_le32(&dv_sys_module_regs->pinmux[offset], (mask & value)); in dm365_pinmux_ctl()