42 	unsigned mul, div;  in at91_pll_rate()  local
44 	div = reg & 0xff;  in at91_pll_rate()
46 	if (div && mul) {  in at91_pll_rate()
47 		freq /= div;  in at91_pll_rate()
153 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)  in at91_enable_periph_generated_clk()  argument
162 	if (div > 0xff)  in at91_enable_periph_generated_clk()
200 		  AT91_PMC_PCR_GCKDIV_(div) |  in at91_enable_periph_generated_clk()
219 	u32 regval, clk_source, div;  in at91_get_periph_generated_clk()  local
251 	div = ((regval & AT91_PMC_PCR_GCKDIV) >> AT91_PMC_PCR_GCKDIV_OFFSET);  in at91_get_periph_generated_clk()
252 	div += 1;  in at91_get_periph_generated_clk()
254 	return freq / div;  in at91_get_periph_generated_clk()