include/asm/macro.h

160  * @tmp:    temporary register
166 .macro armv8_switch_to_el2_m, ep, flag, tmp
168 	mov	\tmp, #CPTR_EL2_RES1
169 	msr	cptr_el2, \tmp		/* Disable coprocessor traps to EL2 */
180 	ldr	\tmp, =(SCTLR_EL2_RES1 | SCTLR_EL2_EE_LE |\
184 	msr	sctlr_el2, \tmp
186 	mov	\tmp, sp
187 	msr	sp_el2, \tmp		/* Migrate SP */
188 	mrs	\tmp, vbar_el3
189 	msr	vbar_el2, \tmp		/* Migrate VBAR */
201 	ldr	\tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\
204 	ldr	\tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\
208 	msr	scr_el3, \tmp
211 	ldr	\tmp, =(SPSR_EL_DEBUG_MASK | SPSR_EL_SERR_MASK |\
214 	msr	spsr_el3, \tmp
223 	ldr	\tmp, =(SCR_EL3_RW_AARCH32 | SCR_EL3_HCE_EN |\
226 	msr	scr_el3, \tmp
229 	ldr     \tmp, =(SPSR_EL_END_LE | SPSR_EL_ASYN_MASK |\
233 	msr	spsr_el3, \tmp
243  * @tmp:    temporary register
249 .macro armv8_switch_to_el1_m, ep, flag, tmp
251 	mrs	\tmp, cnthctl_el2
253 	orr	\tmp, \tmp, #(CNTHCTL_EL2_EL1PCEN_EN |\
255 	msr	cnthctl_el2, \tmp
259 	mrs	\tmp, midr_el1
260 	msr	vpidr_el2, \tmp
261 	mrs	\tmp, mpidr_el1
262 	msr	vmpidr_el2, \tmp
265 	mov	\tmp, #CPTR_EL2_RES1
266 	msr	cptr_el2, \tmp		/* Disable coprocessor traps to EL2 */
268 	mov	\tmp, #CPACR_EL1_FPEN_EN
269 	msr	cpacr_el1, \tmp		/* Enable FP/SIMD at EL1 */
278 	ldr	\tmp, =(SCTLR_EL1_RES1 | SCTLR_EL1_UCI_DIS |\
287 	msr	sctlr_el1, \tmp
289 	mov	\tmp, sp
290 	msr	sp_el1, \tmp		/* Migrate SP */
291 	mrs	\tmp, vbar_el2
292 	msr	vbar_el1, \tmp		/* Migrate VBAR */
299 	ldr	\tmp, =(HCR_EL2_RW_AARCH64 | HCR_EL2_HCD_DIS)
300 	msr	hcr_el2, \tmp
303 	ldr	\tmp, =(SPSR_EL_DEBUG_MASK | SPSR_EL_SERR_MASK |\
306 	msr	spsr_el2, \tmp
312 	ldr	\tmp, =(HCR_EL2_RW_AARCH32 | HCR_EL2_HCD_DIS)
313 	msr	hcr_el2, \tmp
316 	ldr	\tmp, =(SPSR_EL_END_LE | SPSR_EL_ASYN_MASK |\
320 	msr     spsr_el2, \tmp