Lines Matching refs:clock_id

62 unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn,
74 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,
89 int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn,
197 enum clock_id clock_get_periph_parent(enum periph_id periph_id);
209 		enum clock_id parent, unsigned rate);
222 		enum clock_id parent);
238 		enum clock_id parent, unsigned rate, int *extra_div);
246 unsigned clock_get_rate(enum clock_id clkid);
298 struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid);
328 enum clock_id get_periph_clock_id(enum periph_id periph_id, int source);
343 		enum clock_id parent, int *mux_bits, int *divider_bits);
372 int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon);
410 	enum clock_id parent_clock_id;