Lines Matching refs:SIUL2_BASE_ADDR
12 #define SIUL2_MIDR1 (SIUL2_BASE_ADDR + 0x00000004)
13 #define SIUL2_MIDR2 (SIUL2_BASE_ADDR + 0x00000008)
14 #define SIUL2_DISR0 (SIUL2_BASE_ADDR + 0x00000010)
15 #define SIUL2_DIRER0 (SIUL2_BASE_ADDR + 0x00000018)
16 #define SIUL2_DIRSR0 (SIUL2_BASE_ADDR + 0x00000020)
17 #define SIUL2_IREER0 (SIUL2_BASE_ADDR + 0x00000028)
18 #define SIUL2_IFEER0 (SIUL2_BASE_ADDR + 0x00000030)
19 #define SIUL2_IFER0 (SIUL2_BASE_ADDR + 0x00000038)
21 #define SIUL2_IFMCR_BASE (SIUL2_BASE_ADDR + 0x00000040)
24 #define SIUL2_IFCPR (SIUL2_BASE_ADDR + 0x000000C0)
29 #define SIUL2_MSCR_BASE (SIUL2_BASE_ADDR + 0x00000240)
32 #define SIUL2_IMCR_BASE (SIUL2_BASE_ADDR + 0x00000A40)
35 #define SIUL2_GPDO_BASE (SIUL2_BASE_ADDR + 0x00001300)
38 #define SIUL2_GPDI_BASE (SIUL2_BASE_ADDR + 0x00001500)
41 #define SIUL2_PGPDO_BASE (SIUL2_BASE_ADDR + 0x00001700)
44 #define SIUL2_PGPDI_BASE (SIUL2_BASE_ADDR + 0x00001740)
47 #define SIUL2_MPGPDO_BASE (SIUL2_BASE_ADDR + 0x00001780)