Lines Matching refs:uint32_t
13 uint32_t soc_con0; /* address offset: 0x0000 */
14 uint32_t soc_con1; /* address offset: 0x0004 */
15 uint32_t soc_con2; /* address offset: 0x0008 */
16 uint32_t soc_con3; /* address offset: 0x000c */
17 uint32_t soc_con4; /* address offset: 0x0010 */
18 uint32_t soc_con5; /* address offset: 0x0014 */
19 uint32_t soc_con6; /* address offset: 0x0018 */
20 uint32_t soc_con7; /* address offset: 0x001c */
21 uint32_t soc_con8; /* address offset: 0x0020 */
22 uint32_t soc_con9; /* address offset: 0x0024 */
23 uint32_t soc_con10; /* address offset: 0x0028 */
24 uint32_t soc_con11; /* address offset: 0x002c */
25 uint32_t reserved0030; /* address offset: 0x0030 */
26 uint32_t soc_con13; /* address offset: 0x0034 */
27 uint32_t soc_con14; /* address offset: 0x0038 */
28 uint32_t soc_con15; /* address offset: 0x003c */
29 uint32_t soc_con16; /* address offset: 0x0040 */
30 uint32_t soc_con17; /* address offset: 0x0044 */
31 uint32_t soc_con18; /* address offset: 0x0048 */
32 uint32_t soc_con19; /* address offset: 0x004c */
33 uint32_t soc_con20; /* address offset: 0x0050 */
34 uint32_t soc_con21; /* address offset: 0x0054 */
35 uint32_t soc_con22; /* address offset: 0x0058 */
36 uint32_t soc_con23; /* address offset: 0x005c */
37 uint32_t soc_con24; /* address offset: 0x0060 */
38 uint32_t soc_con25; /* address offset: 0x0064 */
39 uint32_t soc_con26; /* address offset: 0x0068 */
40 uint32_t soc_con27; /* address offset: 0x006c */
41 uint32_t soc_con28; /* address offset: 0x0070 */
42 uint32_t soc_con29; /* address offset: 0x0074 */
43 uint32_t soc_con30; /* address offset: 0x0078 */
44 uint32_t soc_con31; /* address offset: 0x007c */
45 uint32_t soc_con32; /* address offset: 0x0080 */
46 uint32_t soc_con33; /* address offset: 0x0084 */
47 uint32_t reserved0088; /* address offset: 0x0088 */
48 uint32_t soc_con35; /* address offset: 0x008c */
49 uint32_t soc_con36; /* address offset: 0x0090 */
50 uint32_t soc_con37; /* address offset: 0x0094 */
51 uint32_t soc_con38; /* address offset: 0x0098 */
52 uint32_t soc_con39; /* address offset: 0x009c */
53 uint32_t soc_con40; /* address offset: 0x00a0 */
54 uint32_t soc_con41; /* address offset: 0x00a4 */
55 uint32_t soc_con42; /* address offset: 0x00a8 */
56 uint32_t soc_con43; /* address offset: 0x00ac */
57 uint32_t reserved00b0[20]; /* address offset: 0x00b0 */
58 uint32_t soc_status0; /* address offset: 0x0100 */
59 uint32_t soc_status1; /* address offset: 0x0104 */
60 uint32_t soc_status2; /* address offset: 0x0108 */
61 uint32_t reserved010c; /* address offset: 0x010c */
62 uint32_t ddr_status0; /* address offset: 0x0110 */
63 uint32_t ddr_status1; /* address offset: 0x0114 */
64 uint32_t usbphy_status; /* address offset: 0x0118 */
65 uint32_t reserved011c[13]; /* address offset: 0x011c */
66 uint32_t usbotg0_sig_detect_con; /* address offset: 0x0150 */
67 uint32_t usbotg0_sig_detect_status; /* address offset: 0x0154 */
68 uint32_t usbotg0_sig_detect_clr; /* address offset: 0x0158 */
69 uint32_t usbotg0_vbusvalid_detect_con; /* address offset: 0x015c */
70 uint32_t usbotg0_linestate_detect_con; /* address offset: 0x0160 */
71 uint32_t usbotg0_disconnect_detect_con; /* address offset: 0x0164 */
72 uint32_t usbotg0_bvalid_detect_con; /* address offset: 0x0168 */
73 uint32_t usbotg0_id_detect_con; /* address offset: 0x016c */
74 uint32_t usbotg1_sig_detect_con; /* address offset: 0x0170 */
75 uint32_t usbotg1_sig_detect_status; /* address offset: 0x0174 */
76 uint32_t usbotg1_sig_detect_clr; /* address offset: 0x0178 */
77 uint32_t usbotg1_vbusvalid_detect_con; /* address offset: 0x017c */
78 uint32_t usbotg1_linestate_detect_con; /* address offset: 0x0180 */
79 uint32_t usbotg1_disconnect_detect_con; /* address offset: 0x0184 */
80 uint32_t usbotg1_bvalid_detect_con; /* address offset: 0x0188 */
81 uint32_t usbotg1_id_detect_con; /* address offset: 0x018c */
82 uint32_t reserved0190[4]; /* address offset: 0x0190 */
83 uint32_t mac0_mcgr_ack; /* address offset: 0x01a0 */
84 uint32_t mac1_mcgr_ack; /* address offset: 0x01a4 */
85 uint32_t reserved01a8[22]; /* address offset: 0x01a8 */
86 uint32_t os_reg0; /* address offset: 0x0200 */
87 uint32_t os_reg1; /* address offset: 0x0204 */
88 uint32_t os_reg2; /* address offset: 0x0208 */
89 uint32_t os_reg3; /* address offset: 0x020c */
90 uint32_t os_reg4; /* address offset: 0x0210 */
91 uint32_t os_reg5; /* address offset: 0x0214 */
92 uint32_t os_reg6; /* address offset: 0x0218 */
93 uint32_t os_reg7; /* address offset: 0x021c */
94 uint32_t os_reg8; /* address offset: 0x0220 */
95 uint32_t os_reg9; /* address offset: 0x0224 */
96 uint32_t os_reg10; /* address offset: 0x0228 */
97 uint32_t os_reg11; /* address offset: 0x022c */
98 uint32_t reserved0230[52]; /* address offset: 0x0230 */
99 uint32_t soc_version; /* address offset: 0x0300 */
106 uint32_t pvtpll_con0_l; /* address offset: 0x0000 */
107 uint32_t pvtpll_con0_h; /* address offset: 0x0004 */
108 uint32_t pvtpll_con1; /* address offset: 0x0008 */
109 uint32_t pvtpll_con2; /* address offset: 0x000c */
110 uint32_t pvtpll_con3; /* address offset: 0x0010 */
111 uint32_t pvtpll_osc_cnt; /* address offset: 0x0014 */
112 uint32_t pvtpll_osc_cnt_avg; /* address offset: 0x0018 */
113 uint32_t reserved001c[17]; /* address offset: 0x001c */
114 uint32_t cpu_status; /* address offset: 0x0060 */
115 uint32_t cpu_con0; /* address offset: 0x0064 */
116 uint32_t cpu_con1; /* address offset: 0x0068 */
117 uint32_t cpu_mem_con0; /* address offset: 0x006c */
118 uint32_t reserved0070[5]; /* address offset: 0x0070 */
119 uint32_t soc_con0; /* address offset: 0x0084 */
120 uint32_t soc_con1; /* address offset: 0x0088 */
121 uint32_t soc_con2; /* address offset: 0x008c */
122 uint32_t soc_con3; /* address offset: 0x0090 */
123 uint32_t soc_con4; /* address offset: 0x0094 */
124 uint32_t soc_con5; /* address offset: 0x0098 */
131 uint32_t soc_con0; /* address offset: 0x0000 */
132 uint32_t soc_con1; /* address offset: 0x0004 */
133 uint32_t soc_con2; /* address offset: 0x0008 */
134 uint32_t soc_con3; /* address offset: 0x000c */
135 uint32_t soc_con4; /* address offset: 0x0010 */
136 uint32_t soc_con5; /* address offset: 0x0014 */
137 uint32_t soc_con6; /* address offset: 0x0018 */
138 uint32_t soc_con7; /* address offset: 0x001c */
139 uint32_t soc_con8; /* address offset: 0x0020 */
140 uint32_t soc_con9; /* address offset: 0x0024 */
141 uint32_t soc_con10; /* address offset: 0x0028 */
142 uint32_t soc_con11; /* address offset: 0x002c */
143 uint32_t soc_con12; /* address offset: 0x0030 */
144 uint32_t soc_con13; /* address offset: 0x0034 */
145 uint32_t soc_con14; /* address offset: 0x0038 */
146 uint32_t soc_con15; /* address offset: 0x003c */
147 uint32_t soc_con16; /* address offset: 0x0040 */
148 uint32_t soc_con17; /* address offset: 0x0044 */
149 uint32_t soc_con18; /* address offset: 0x0048 */
150 uint32_t reserved004c[45]; /* address offset: 0x004c */
151 uint32_t soc_status; /* address offset: 0x0100 */
152 uint32_t reserved0104[63]; /* address offset: 0x0104 */
153 uint32_t os_reg0; /* address offset: 0x0200 */
154 uint32_t os_reg1; /* address offset: 0x0204 */
155 uint32_t os_reg2; /* address offset: 0x0208 */
156 uint32_t os_reg3; /* address offset: 0x020c */
157 uint32_t os_reg4; /* address offset: 0x0210 */
158 uint32_t os_reg5; /* address offset: 0x0214 */
159 uint32_t os_reg6; /* address offset: 0x0218 */
160 uint32_t os_reg7; /* address offset: 0x021c */
161 uint32_t os_reg8; /* address offset: 0x0220 */
162 uint32_t os_reg9; /* address offset: 0x0224 */
163 uint32_t os_reg10; /* address offset: 0x0228 */
164 uint32_t os_reg11; /* address offset: 0x022c */
165 uint32_t rstfunc_status; /* address offset: 0x0230 */
166 uint32_t rstfunc_clr; /* address offset: 0x0234 */
167 uint32_t reserved0238[882]; /* address offset: 0x0238 */
168 uint32_t mcu_iso_con0; /* address offset: 0x1000 */
169 uint32_t mcu_iso_con1; /* address offset: 0x1004 */
170 uint32_t mcu_iso_con2; /* address offset: 0x1008 */
171 uint32_t mcu_iso_con3; /* address offset: 0x100c */
172 uint32_t mcu_iso_con4; /* address offset: 0x1010 */
173 uint32_t mcu_iso_con5; /* address offset: 0x1014 */
174 uint32_t mcu_iso_con6; /* address offset: 0x1018 */
175 uint32_t mcu_iso_con7; /* address offset: 0x101c */
176 uint32_t mcu_iso_con8; /* address offset: 0x1020 */
177 uint32_t mcu_iso_con9; /* address offset: 0x1024 */
178 uint32_t mcu_iso_con10; /* address offset: 0x1028 */
179 uint32_t mcu_iso_con11; /* address offset: 0x102c */
180 uint32_t reserved1030[244]; /* address offset: 0x1030 */
181 uint32_t mcu_iso_ddr_con0; /* address offset: 0x1400 */
182 uint32_t mcu_iso_ddr_con1; /* address offset: 0x1404 */
183 uint32_t reserved1408[62]; /* address offset: 0x1408 */
184 uint32_t mcu_iso_lock; /* address offset: 0x1500 */
185 uint32_t reserved1504[703]; /* address offset: 0x1504 */
186 uint32_t cpu_iso_con0; /* address offset: 0x2000 */
187 uint32_t cpu_iso_con1; /* address offset: 0x2004 */
188 uint32_t cpu_iso_con2; /* address offset: 0x2008 */
189 uint32_t cpu_iso_con3; /* address offset: 0x200c */
190 uint32_t cpu_iso_con4; /* address offset: 0x2010 */
191 uint32_t cpu_iso_con5; /* address offset: 0x2014 */
192 uint32_t cpu_iso_con6; /* address offset: 0x2018 */
193 uint32_t cpu_iso_con7; /* address offset: 0x201c */
194 uint32_t cpu_iso_con8; /* address offset: 0x2020 */
195 uint32_t cpu_iso_con9; /* address offset: 0x2024 */
196 uint32_t cpu_iso_con10; /* address offset: 0x2028 */
197 uint32_t cpu_iso_con11; /* address offset: 0x202c */
198 uint32_t reserved2030[244]; /* address offset: 0x2030 */
199 uint32_t cpu_iso_ddr_con0; /* address offset: 0x2400 */
200 uint32_t cpu_iso_ddr_con1; /* address offset: 0x2404 */
201 uint32_t reserved2408[62]; /* address offset: 0x2408 */
202 uint32_t cpu_iso_lock; /* address offset: 0x2500 */