Lines Matching refs:IOMUXC_DDR_RBASE
217 #define IOMUXC_DDR_RBASE ((AIPS3_BASE + (AIPS3_SLOT_SIZE * IOMUXC_DDR_AIPS3_SLOT))) macro
220 #define IOMUXC_DPCR_DDR_DQS0 ((IOMUXC_DDR_RBASE + (4 * 32)))
221 #define IOMUXC_DPCR_DDR_DQS1 ((IOMUXC_DDR_RBASE + (4 * 33)))
222 #define IOMUXC_DPCR_DDR_DQS2 ((IOMUXC_DDR_RBASE + (4 * 34)))
223 #define IOMUXC_DPCR_DDR_DQS3 ((IOMUXC_DDR_RBASE + (4 * 35)))
226 #define IOMUXC_DPCR_DDR_DQ0 ((IOMUXC_DDR_RBASE + (4 * 0)))
227 #define IOMUXC_DPCR_DDR_DQ1 ((IOMUXC_DDR_RBASE + (4 * 1)))
228 #define IOMUXC_DPCR_DDR_DQ2 ((IOMUXC_DDR_RBASE + (4 * 2)))
229 #define IOMUXC_DPCR_DDR_DQ3 ((IOMUXC_DDR_RBASE + (4 * 3)))
230 #define IOMUXC_DPCR_DDR_DQ4 ((IOMUXC_DDR_RBASE + (4 * 4)))
231 #define IOMUXC_DPCR_DDR_DQ5 ((IOMUXC_DDR_RBASE + (4 * 5)))
232 #define IOMUXC_DPCR_DDR_DQ6 ((IOMUXC_DDR_RBASE + (4 * 6)))
233 #define IOMUXC_DPCR_DDR_DQ7 ((IOMUXC_DDR_RBASE + (4 * 7)))
234 #define IOMUXC_DPCR_DDR_DQ8 ((IOMUXC_DDR_RBASE + (4 * 8)))
235 #define IOMUXC_DPCR_DDR_DQ9 ((IOMUXC_DDR_RBASE + (4 * 9)))
236 #define IOMUXC_DPCR_DDR_DQ10 ((IOMUXC_DDR_RBASE + (4 * 10)))
237 #define IOMUXC_DPCR_DDR_DQ11 ((IOMUXC_DDR_RBASE + (4 * 11)))
238 #define IOMUXC_DPCR_DDR_DQ12 ((IOMUXC_DDR_RBASE + (4 * 12)))
239 #define IOMUXC_DPCR_DDR_DQ13 ((IOMUXC_DDR_RBASE + (4 * 13)))
240 #define IOMUXC_DPCR_DDR_DQ14 ((IOMUXC_DDR_RBASE + (4 * 14)))
241 #define IOMUXC_DPCR_DDR_DQ15 ((IOMUXC_DDR_RBASE + (4 * 15)))
242 #define IOMUXC_DPCR_DDR_DQ16 ((IOMUXC_DDR_RBASE + (4 * 16)))
243 #define IOMUXC_DPCR_DDR_DQ17 ((IOMUXC_DDR_RBASE + (4 * 17)))
244 #define IOMUXC_DPCR_DDR_DQ18 ((IOMUXC_DDR_RBASE + (4 * 18)))
245 #define IOMUXC_DPCR_DDR_DQ19 ((IOMUXC_DDR_RBASE + (4 * 19)))
246 #define IOMUXC_DPCR_DDR_DQ20 ((IOMUXC_DDR_RBASE + (4 * 20)))
247 #define IOMUXC_DPCR_DDR_DQ21 ((IOMUXC_DDR_RBASE + (4 * 21)))
248 #define IOMUXC_DPCR_DDR_DQ22 ((IOMUXC_DDR_RBASE + (4 * 22)))
249 #define IOMUXC_DPCR_DDR_DQ23 ((IOMUXC_DDR_RBASE + (4 * 23)))
250 #define IOMUXC_DPCR_DDR_DQ24 ((IOMUXC_DDR_RBASE + (4 * 24)))
251 #define IOMUXC_DPCR_DDR_DQ25 ((IOMUXC_DDR_RBASE + (4 * 25)))
252 #define IOMUXC_DPCR_DDR_DQ26 ((IOMUXC_DDR_RBASE + (4 * 26)))
253 #define IOMUXC_DPCR_DDR_DQ27 ((IOMUXC_DDR_RBASE + (4 * 27)))
254 #define IOMUXC_DPCR_DDR_DQ28 ((IOMUXC_DDR_RBASE + (4 * 28)))
255 #define IOMUXC_DPCR_DDR_DQ29 ((IOMUXC_DDR_RBASE + (4 * 29)))
256 #define IOMUXC_DPCR_DDR_DQ30 ((IOMUXC_DDR_RBASE + (4 * 30)))
257 #define IOMUXC_DPCR_DDR_DQ31 ((IOMUXC_DDR_RBASE + (4 * 31)))