Lines Matching defs:mx6_ddr_sysinfo
396 struct mx6_ddr_sysinfo { struct
397 u8 dsize; /* size of bus (in dwords: 0=16bit,1=32bit,2=64bit) */
398 u8 cs_density; /* density per chip select (Gb) */
399 u8 ncs; /* number chip selects used (1|2) */
400 char cs1_mirror;/* enable address mirror (0|1) */
401 char bi_on; /* Bank interleaving enable */
402 u8 rtt_nom; /* Rtt_Nom (DDR3_RTT_*) */
403 u8 rtt_wr; /* Rtt_Wr (DDR3_RTT_*) */
404 u8 ralat; /* Read Additional Latency (0-7) */
405 u8 walat; /* Write Additional Latency (0-3) */
406 u8 mif3_mode; /* Command prediction working mode */
407 u8 rst_to_cke; /* Time from SDE enable to CKE rise */
408 u8 sde_to_rst; /* Time from SDE enable until DDR reset# is high */
409 u8 pd_fast_exit;/* enable precharge powerdown fast-exit */
410 u8 ddr_type; /* DDR type: DDR3(0) or LPDDR2(1) */
411 u8 refsel; /* REF_SEL field of register MDREF */
412 u8 refr; /* REFR field of register MDREF */