Lines Matching refs:r0
24 ldr r0, =AIPS1_BASE_ADDR
26 str r1, [r0, #AIPS_MPR_0_7]
27 str r1, [r0, #AIPS_MPR_8_15]
34 str r1, [r0, #AIPS_OPACR_0_7]
35 str r1, [r0, #AIPS_OPACR_8_15]
36 str r1, [r0, #AIPS_OPACR_16_23]
37 str r1, [r0, #AIPS_OPACR_24_31]
38 str r1, [r0, #AIPS_OPACR_32_39]
55 ldr r0, =MAX_BASE_ADDR
57 str r1, [r0, #MAX_MPR0] /* for S0 */
58 str r1, [r0, #MAX_MPR1] /* for S1 */
59 str r1, [r0, #MAX_MPR2] /* for S2 */
60 str r1, [r0, #MAX_MPR3] /* for S3 */
61 str r1, [r0, #MAX_MPR4] /* for S4 */
63 str r1, [r0, #MAX_SGPCR0] /* for S0 */
64 str r1, [r0, #MAX_SGPCR1] /* for S1 */
65 str r1, [r0, #MAX_SGPCR2] /* for S2 */
66 str r1, [r0, #MAX_SGPCR3] /* for S3 */
67 str r1, [r0, #MAX_SGPCR4] /* for S4 */
69 str r1, [r0, #MAX_MGPCR0] /* for M0 */
70 str r1, [r0, #MAX_MGPCR1] /* for M1 */
71 str r1, [r0, #MAX_MGPCR2] /* for M2 */
72 str r1, [r0, #MAX_MGPCR3] /* for M3 */
73 str r1, [r0, #MAX_MGPCR4] /* for M4 */
74 str r1, [r0, #MAX_MGPCR5] /* for M5 */
102 mrc p15, 0, r0, c1, c0, 1
103 orr r0, r0, #7
104 mcr p15, 0, r0, c1, c0, 1
115 mov r0, #0
117 mcr p15, 0, r0, c15, c2, 4
119 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I cache and D cache */
120 mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLBs */
121 mcr p15, 0, r0, c7, c10, 4 /* Drain the write buffer */
124 ldr r0, =0x40000015 /* Start from AIPS 2-GB region */
125 mcr p15, 0, r0, c15, c2, 4