Lines Matching refs:CONFIG_SYS_IMMR
15 #define CONFIG_SYS_IMMR 0x01000000 macro
21 #define SYS_FSL_GIC_ADDR (CONFIG_SYS_IMMR + 0x00400000)
22 #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000)
23 #define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x00180000)
24 #define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x00510000)
25 #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000)
26 #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000)
27 #define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000)
28 #define CONFIG_SYS_FSL_SEC_ADDR (CONFIG_SYS_IMMR + 0x700000)
29 #define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_IMMR + 0x710000)
30 #define CONFIG_SYS_SEC_MON_ADDR (CONFIG_SYS_IMMR + 0x00e90000)
31 #define CONFIG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0x00e80200)
32 #define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000)
33 #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
34 #define CONFIG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000)
35 #define CONFIG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000)
36 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500)
37 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500)
38 #define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000)
39 #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
40 #define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000)
49 #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
50 #define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
52 #define SCTR_BASE_ADDR (CONFIG_SYS_IMMR + 0x01b00000)
54 #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01180000)
55 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01190000)
56 #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x011a0000)
58 #define WDOG1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01ad0000)
60 #define QSPI0_BASE_ADDR (CONFIG_SYS_IMMR + 0x00550000)
61 #define DSPI1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01100000)
63 #define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
65 #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
66 #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
83 #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000)