Lines Matching refs:x0

30 		reg = <0x0 0x1410000 0 0x10000>, /* GICD */
31 		      <0x0 0x1420000 0 0x10000>, /* GICC */
32 		      <0x0 0x1440000 0 0x20000>, /* GICH */
33 		      <0x0 0x1460000 0 0x20000>; /* GICV */
45 			reg = <0x0 0x1ee1000 0x0 0x1000>;
54 			reg = <0x0 0x2100000 0x0 0x10000>;
67 			reg = <0x0 0x2110000 0x0 0x10000>;
78 			reg = <0x0 0x1530000 0x0 0x10000>;
86 			reg = <0x0 0x2180000 0x0 0x10000>;
97 			reg = <0x0 0x2190000 0x0 0x10000>;
108 			reg = <0x0 0x21a0000 0x0 0x10000>;
119 			reg = <0x0 0x21b0000 0x0 0x10000>;
128 			reg = <0x00 0x21c0500 0x0 0x100>;
135 			reg = <0x00 0x21c0600 0x0 0x100>;
142 			reg = <0x0 0x21d0500 0x0 0x100>;
149 			reg = <0x0 0x21d0600 0x0 0x100>;
156 			reg = <0x0 0x2950000 0x0 0x1000>;
165 			reg = <0x0 0x2960000 0x0 0x1000>;
174 			reg = <0x0 0x2970000 0x0 0x1000>;
183 			reg = <0x0 0x2980000 0x0 0x1000>;
192 			reg = <0x0 0x2990000 0x0 0x1000>;
201 			reg = <0x0 0x29a0000 0x0 0x1000>;
212 			reg = <0x0 0x1550000 0x0 0x10000>,
213 				<0x0 0x40000000 0x0 0x10000000>;
222 			reg = <0x0 0x2f00000 0x0 0x10000>;
229 			reg = <0x0 0x3000000 0x0 0x10000>;
236 			reg = <0x0 0x3100000 0x0 0x10000>;
243 			reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */
244 			       0x00 0x03480000 0x0 0x40000   /* lut registers */
245 			       0x00 0x034c0000 0x0 0x40000   /* pf controls registers */
246 			       0x40 0x00000000 0x0 0x20000>; /* configuration space */
252 			bus-range = <0x0 0xff>;
253 			ranges = <0x81000000 0x0 0x00000000 0x40 0x00020000 0x0 0x00010000   /* downstream I/O */
254 				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
259 			reg = <0x00 0x03500000 0x0 0x80000   /* dbi registers */
260 			       0x00 0x03580000 0x0 0x40000   /* lut registers */
261 			       0x00 0x035c0000 0x0 0x40000   /* pf controls registers */
262 			       0x48 0x00000000 0x0 0x20000>; /* configuration space */
269 			bus-range = <0x0 0xff>;
270 			ranges = <0x81000000 0x0 0x00000000 0x48 0x00020000 0x0 0x00010000   /* downstream I/O */
271 				  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
276 			reg = <0x00 0x03600000 0x0 0x80000   /* dbi registers */
277 			       0x00 0x03680000 0x0 0x40000   /* lut registers */
278 			       0x00 0x036c0000 0x0 0x40000   /* pf controls registers */
279 			       0x50 0x00000000 0x0 0x20000>; /* configuration space */
285 			bus-range = <0x0 0xff>;
286 			ranges = <0x81000000 0x0 0x00000000 0x50 0x00020000 0x0 0x00010000   /* downstream I/O */
287 				  0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */