Lines Matching refs:interrupts
47 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
62 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
128 interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
251 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
278 interrupts = <0 232 0x4>, <0 233 0x4>;
314 interrupts = <0 355 0x4>, <0 356 0x4>;
394 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
406 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
420 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
442 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
450 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
457 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
468 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
479 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
490 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
501 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
512 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
523 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
534 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
546 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
558 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
570 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
582 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
594 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
606 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
618 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
628 interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
638 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
648 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
657 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
670 interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
684 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
698 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
712 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
726 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
740 interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
754 interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
768 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
782 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
796 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
810 interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
824 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
838 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
846 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
853 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
860 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
867 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
874 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
881 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
888 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
895 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
902 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
909 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
916 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
925 interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
932 interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
939 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
946 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
953 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
967 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
974 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
984 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
994 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1004 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1014 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
1024 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
1037 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
1059 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
1070 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1080 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
1090 interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
1100 interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
1242 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1263 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1279 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1292 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
1314 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
1384 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1394 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1453 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1461 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
1480 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
1488 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
1508 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
1517 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
1533 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
1542 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1573 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1590 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1607 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
1623 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
1639 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
1655 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
1671 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
1687 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
1746 interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1784 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
1794 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1814 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1829 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
1931 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1942 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
1953 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1964 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1975 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;