Lines Matching refs:width
113 .width = PERIPH_MUX_WIDTH, \
125 .width = PERIPH_MUX_WIDTH, \
138 .width = PERIPH_DIV1_WIDTH, \
151 .width = PERIPH_DIV2_WIDTH, \
165 .width = PERIPH_DIV##id##_WIDTH, \
179 .width = PERIPH_GATE_WIDTH, \
192 .width = PERIPH_GATE_WIDTH, \
217 uint8_t width; member
256 .width = NA_WIDTH,
268 .width = NA_WIDTH,
280 .width = PLL_PRESRC_MUX_WIDTH,
292 .width = NA_WIDTH,
304 .width = PLL_DIV2_MUX_WIDTH,
318 .width = PLL_POSTSRC_MUX_WIDTH,
330 .width = PLL_BYPASS_MUX_WIDTH,
344 .width = PERIPH_MUX_WIDTH,
353 .width = PERIPH_DIV1_WIDTH,
389 .width = PERIPH_MUX_WIDTH,
399 .width = PERIPH_DIV1_WIDTH,
410 .width = PERIPH_DIV2_WIDTH,
421 .width = PERIPH_GATE_WIDTH,
438 .width = PERIPH_GATE_WIDTH,
451 .width = 6,
463 .width = 6,
475 .width = 1,
484 .width = PERIPH_GATE_WIDTH,
498 .width = PERIPH_GATE_WIDTH,
512 .width = 1,
527 .width = 6,
540 .width = PERIPH_DIV1_WIDTH,
549 .width = PERIPH_DIV2_WIDTH,
558 .width = PERIPH_GATE_WIDTH,
570 .width = PERIPH_GATE_WIDTH,
582 .width = PERIPH_GATE_WIDTH,
595 .width = 6,
604 .width = 6,
617 .width = 1,
631 .width = 1,
645 .width = 1,
659 .width = 1,
673 .width = PERIPH_GATE_WIDTH,
685 .width = PERIPH_GATE_WIDTH,
697 .width = 2,
711 .width = 7,
725 .width = 1,
739 .width = 1,
753 .width = 1,
767 .width = PERIPH_GATE_WIDTH,
780 .width = 3,
795 .width = 6,
2718 ((uint32_t)BIT(nodes[i].width) - (uint32_t)1U))); in pm_api_clock_get_max_divisor()
2720 *max_div = (uint32_t)BIT(nodes[i].width) - (uint32_t)1U; in pm_api_clock_get_max_divisor()