Lines Matching refs:x0
34 ldr x0, k3_boot_reason_data_store
35 cmp x0, #K3_BOOT_REASON_COLD_RESET
39 mov x0, #0
72 mrs x0, MPIDR_EL1
74 and x1, x0, #MPIDR_CLUSTER_MASK
76 and x0, x0, #MPIDR_CPU_MASK
80 add x0, x0, #K3_CLUSTER0_CORE_COUNT
84 add x0, x0, #K3_CLUSTER1_CORE_COUNT
88 add x0, x0, #K3_CLUSTER2_CORE_COUNT
107 mrs x0, CORTEX_A72_L2CTLR_EL1
110 orr x0, x0, #(CORTEX_A72_L2_DATA_RAM_LATENCY_4_CYCLES << \
114 orr x0, x0, #(CORTEX_A72_L2_DATA_RAM_LATENCY_3_CYCLES << \
118 orr x0, x0, #CORTEX_A72_L2CTLR_EL1_ECC_AND_PARITY_ENABLE
119 orr x0, x0, #CORTEX_A72_L2CTLR_EL1_DATA_INLINE_ECC_ENABLE
120 msr CORTEX_A72_L2CTLR_EL1, x0
122 mrs x0, CORTEX_A72_L2ACTLR_EL1
124 orr x0, x0, #CORTEX_A72_L2ACTLR_ENABLE_UNIQUE_CLEAN
125 msr CORTEX_A72_L2ACTLR_EL1, x0
128 mrs x0, CORTEX_A72_CPUACTLR_EL1
130 orr x0, x0, #CORTEX_A72_CPUACTLR_EL1_DELAY_EXCLUSIVE_SNOOP
131 msr CORTEX_A72_CPUACTLR_EL1, x0
147 mov_imm x0, CRASH_CONSOLE_BASE
177 mov_imm x0, CRASH_CONSOLE_BASE