Lines Matching refs:src
421 int src, div; in clk_scmi_cpul_get_rate() local
423 src = mmio_read_32(DSUCRU_BASE + CRU_CLKSEL_CON(6)) & 0x0060; in clk_scmi_cpul_get_rate()
424 src = src >> 5; in clk_scmi_cpul_get_rate()
425 if (src == 2) { in clk_scmi_cpul_get_rate()
428 src = mmio_read_32(DSUCRU_BASE + CRU_CLKSEL_CON(5)) & 0xc000; in clk_scmi_cpul_get_rate()
429 src = src >> 14; in clk_scmi_cpul_get_rate()
431 switch (src) { in clk_scmi_cpul_get_rate()
591 int value, src, div; in clk_scmi_cpub01_get_rate() local
594 src = (value & 0x6000) >> 13; in clk_scmi_cpub01_get_rate()
595 if (src == 2) { in clk_scmi_cpub01_get_rate()
598 src = (value & 0x00c0) >> 6; in clk_scmi_cpub01_get_rate()
600 switch (src) { in clk_scmi_cpub01_get_rate()
760 int value, src, div; in clk_scmi_cpub23_get_rate() local
763 src = (value & 0x6000) >> 13; in clk_scmi_cpub23_get_rate()
764 if (src == 2) { in clk_scmi_cpub23_get_rate()
767 src = (value & 0x00c0) >> 6; in clk_scmi_cpub23_get_rate()
769 switch (src) { in clk_scmi_cpub23_get_rate()
793 int src, div; in clk_scmi_dsu_get_rate() local
795 src = mmio_read_32(DSUCRU_BASE + CRU_CLKSEL_CON(1)) & 0x1; in clk_scmi_dsu_get_rate()
796 if (src != 0) { in clk_scmi_dsu_get_rate()
799 src = mmio_read_32(DSUCRU_BASE + CRU_CLKSEL_CON(0)) & 0x3000; in clk_scmi_dsu_get_rate()
800 src = src >> 12; in clk_scmi_dsu_get_rate()
803 switch (src) { in clk_scmi_dsu_get_rate()
916 int div, src; in clk_scmi_gpu_get_rate() local
922 src = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(158)) & 0x00e0; in clk_scmi_gpu_get_rate()
923 src = src >> 5; in clk_scmi_gpu_get_rate()
924 switch (src) { in clk_scmi_gpu_get_rate()
1014 int div, src; in clk_scmi_npu_get_rate() local
1021 src = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(73)) & 0x0380; in clk_scmi_npu_get_rate()
1022 src = src >> 7; in clk_scmi_npu_get_rate()
1023 switch (src) { in clk_scmi_npu_get_rate()
1175 uint32_t src; in clk_scmi_cclk_sdmmc_get_rate() local
1177 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x3000; in clk_scmi_cclk_sdmmc_get_rate()
1178 src = src >> 12; in clk_scmi_cclk_sdmmc_get_rate()
1181 if (src == 1) { in clk_scmi_cclk_sdmmc_get_rate()
1183 } else if (src == 2) { in clk_scmi_cclk_sdmmc_get_rate()
1224 uint32_t src; in clk_scmi_dclk_sdmmc_get_rate() local
1226 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x0020; in clk_scmi_dclk_sdmmc_get_rate()
1228 if (src != 0) { in clk_scmi_dclk_sdmmc_get_rate()
1262 uint32_t src; in clk_scmi_aclk_secure_ns_get_rate() local
1264 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0003; in clk_scmi_aclk_secure_ns_get_rate()
1265 switch (src) { in clk_scmi_aclk_secure_ns_get_rate()
1281 uint32_t src; in clk_scmi_aclk_secure_ns_set_rate() local
1284 src = 0; in clk_scmi_aclk_secure_ns_set_rate()
1286 src = 1; in clk_scmi_aclk_secure_ns_set_rate()
1288 src = 2; in clk_scmi_aclk_secure_ns_set_rate()
1290 src = 3; in clk_scmi_aclk_secure_ns_set_rate()
1293 BITS_WITH_WMASK(src, 0x3U, 0)); in clk_scmi_aclk_secure_ns_set_rate()
1305 uint32_t src; in clk_scmi_hclk_secure_ns_get_rate() local
1307 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x000c; in clk_scmi_hclk_secure_ns_get_rate()
1308 src = src >> 2; in clk_scmi_hclk_secure_ns_get_rate()
1309 switch (src) { in clk_scmi_hclk_secure_ns_get_rate()
1325 uint32_t src; in clk_scmi_hclk_secure_ns_set_rate() local
1328 src = 0; in clk_scmi_hclk_secure_ns_set_rate()
1330 src = 1; in clk_scmi_hclk_secure_ns_set_rate()
1332 src = 2; in clk_scmi_hclk_secure_ns_set_rate()
1334 src = 3; in clk_scmi_hclk_secure_ns_set_rate()
1337 BITS_WITH_WMASK(src, 0x3U, 2)); in clk_scmi_hclk_secure_ns_set_rate()
1360 uint32_t src; in clk_scmi_keyladder_core_get_rate() local
1362 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x00c0; in clk_scmi_keyladder_core_get_rate()
1363 src = src >> 6; in clk_scmi_keyladder_core_get_rate()
1364 switch (src) { in clk_scmi_keyladder_core_get_rate()
1380 uint32_t src; in clk_scmi_keyladder_core_set_rate() local
1383 src = 0; in clk_scmi_keyladder_core_set_rate()
1385 src = 1; in clk_scmi_keyladder_core_set_rate()
1387 src = 2; in clk_scmi_keyladder_core_set_rate()
1389 src = 3; in clk_scmi_keyladder_core_set_rate()
1392 BITS_WITH_WMASK(src, 0x3U, 6)); in clk_scmi_keyladder_core_set_rate()
1405 uint32_t src; in clk_scmi_keyladder_rng_get_rate() local
1407 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x0300; in clk_scmi_keyladder_rng_get_rate()
1408 src = src >> 8; in clk_scmi_keyladder_rng_get_rate()
1409 switch (src) { in clk_scmi_keyladder_rng_get_rate()
1425 uint32_t src; in clk_scmi_keyladder_rng_set_rate() local
1428 src = 0; in clk_scmi_keyladder_rng_set_rate()
1430 src = 1; in clk_scmi_keyladder_rng_set_rate()
1432 src = 2; in clk_scmi_keyladder_rng_set_rate()
1434 src = 3; in clk_scmi_keyladder_rng_set_rate()
1437 BITS_WITH_WMASK(src, 0x3U, 8)); in clk_scmi_keyladder_rng_set_rate()
1450 uint32_t src; in clk_scmi_aclk_secure_s_get_rate() local
1452 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0030; in clk_scmi_aclk_secure_s_get_rate()
1453 src = src >> 4; in clk_scmi_aclk_secure_s_get_rate()
1454 switch (src) { in clk_scmi_aclk_secure_s_get_rate()
1470 uint32_t src; in clk_scmi_aclk_secure_s_set_rate() local
1473 src = 0; in clk_scmi_aclk_secure_s_set_rate()
1475 src = 1; in clk_scmi_aclk_secure_s_set_rate()
1477 src = 2; in clk_scmi_aclk_secure_s_set_rate()
1479 src = 3; in clk_scmi_aclk_secure_s_set_rate()
1482 BITS_WITH_WMASK(src, 0x3U, 4)); in clk_scmi_aclk_secure_s_set_rate()
1493 uint32_t src; in clk_scmi_hclk_secure_s_get_rate() local
1495 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x00c0; in clk_scmi_hclk_secure_s_get_rate()
1496 src = src >> 6; in clk_scmi_hclk_secure_s_get_rate()
1497 switch (src) { in clk_scmi_hclk_secure_s_get_rate()
1513 uint32_t src; in clk_scmi_hclk_secure_s_set_rate() local
1516 src = 0; in clk_scmi_hclk_secure_s_set_rate()
1518 src = 1; in clk_scmi_hclk_secure_s_set_rate()
1520 src = 2; in clk_scmi_hclk_secure_s_set_rate()
1522 src = 3; in clk_scmi_hclk_secure_s_set_rate()
1525 BITS_WITH_WMASK(src, 0x3U, 6)); in clk_scmi_hclk_secure_s_set_rate()
1536 uint32_t src; in clk_scmi_pclk_secure_s_get_rate() local
1538 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0300; in clk_scmi_pclk_secure_s_get_rate()
1539 src = src >> 8; in clk_scmi_pclk_secure_s_get_rate()
1540 switch (src) { in clk_scmi_pclk_secure_s_get_rate()
1554 uint32_t src; in clk_scmi_pclk_secure_s_set_rate() local
1557 src = 0; in clk_scmi_pclk_secure_s_set_rate()
1559 src = 1; in clk_scmi_pclk_secure_s_set_rate()
1561 src = 2; in clk_scmi_pclk_secure_s_set_rate()
1564 BITS_WITH_WMASK(src, 0x3U, 8)); in clk_scmi_pclk_secure_s_set_rate()
1575 uint32_t src; in clk_scmi_crypto_rng_get_rate() local
1577 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0xc000; in clk_scmi_crypto_rng_get_rate()
1578 src = src >> 14; in clk_scmi_crypto_rng_get_rate()
1579 switch (src) { in clk_scmi_crypto_rng_get_rate()
1595 uint32_t src; in clk_scmi_crypto_rng_set_rate() local
1598 src = 0; in clk_scmi_crypto_rng_set_rate()
1600 src = 1; in clk_scmi_crypto_rng_set_rate()
1602 src = 2; in clk_scmi_crypto_rng_set_rate()
1604 src = 3; in clk_scmi_crypto_rng_set_rate()
1607 BITS_WITH_WMASK(src, 0x3U, 14)); in clk_scmi_crypto_rng_set_rate()
1621 uint32_t src; in clk_scmi_crypto_core_get_rate() local
1623 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0c00; in clk_scmi_crypto_core_get_rate()
1624 src = src >> 10; in clk_scmi_crypto_core_get_rate()
1625 switch (src) { in clk_scmi_crypto_core_get_rate()
1641 uint32_t src; in clk_scmi_crypto_core_set_rate() local
1644 src = 0; in clk_scmi_crypto_core_set_rate()
1646 src = 1; in clk_scmi_crypto_core_set_rate()
1648 src = 2; in clk_scmi_crypto_core_set_rate()
1650 src = 3; in clk_scmi_crypto_core_set_rate()
1653 BITS_WITH_WMASK(src, 0x3U, 10)); in clk_scmi_crypto_core_set_rate()
1667 uint32_t src; in clk_scmi_crypto_pka_get_rate() local
1669 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x3000; in clk_scmi_crypto_pka_get_rate()
1670 src = src >> 12; in clk_scmi_crypto_pka_get_rate()
1671 switch (src) { in clk_scmi_crypto_pka_get_rate()
1687 uint32_t src; in clk_scmi_crypto_pka_set_rate() local
1690 src = 0; in clk_scmi_crypto_pka_set_rate()
1692 src = 1; in clk_scmi_crypto_pka_set_rate()
1694 src = 2; in clk_scmi_crypto_pka_set_rate()
1696 src = 3; in clk_scmi_crypto_pka_set_rate()
1699 BITS_WITH_WMASK(src, 0x3U, 12)); in clk_scmi_crypto_pka_set_rate()
1713 uint32_t src; in clk_scmi_spll_get_rate() local
1715 src = mmio_read_32(BUSSCRU_BASE + CRU_MODE_CON0) & 0x3; in clk_scmi_spll_get_rate()
1716 switch (src) { in clk_scmi_spll_get_rate()
1730 uint32_t src; in clk_scmi_spll_set_rate() local
1733 src = 1; in clk_scmi_spll_set_rate()
1735 src = 0; in clk_scmi_spll_set_rate()
1743 BITS_WITH_WMASK(src, 0x3U, 0)); in clk_scmi_spll_set_rate()
1766 uint32_t src; in clk_scmi_crypto_rng_s_get_rate() local
1768 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x0030; in clk_scmi_crypto_rng_s_get_rate()
1769 src = src >> 4; in clk_scmi_crypto_rng_s_get_rate()
1770 switch (src) { in clk_scmi_crypto_rng_s_get_rate()
1786 uint32_t src; in clk_scmi_crypto_rng_s_set_rate() local
1789 src = 0; in clk_scmi_crypto_rng_s_set_rate()
1791 src = 1; in clk_scmi_crypto_rng_s_set_rate()
1793 src = 2; in clk_scmi_crypto_rng_s_set_rate()
1795 src = 3; in clk_scmi_crypto_rng_s_set_rate()
1798 BITS_WITH_WMASK(src, 0x3U, 4)); in clk_scmi_crypto_rng_s_set_rate()
1812 uint32_t src; in clk_scmi_crypto_core_s_get_rate() local
1814 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x3; in clk_scmi_crypto_core_s_get_rate()
1815 src = src >> 0; in clk_scmi_crypto_core_s_get_rate()
1816 switch (src) { in clk_scmi_crypto_core_s_get_rate()
1832 uint32_t src; in clk_scmi_crypto_core_s_set_rate() local
1835 src = 0; in clk_scmi_crypto_core_s_set_rate()
1837 src = 1; in clk_scmi_crypto_core_s_set_rate()
1839 src = 2; in clk_scmi_crypto_core_s_set_rate()
1841 src = 3; in clk_scmi_crypto_core_s_set_rate()
1844 BITS_WITH_WMASK(src, 0x3U, 0)); in clk_scmi_crypto_core_s_set_rate()
1858 uint32_t src; in clk_scmi_crypto_pka_s_get_rate() local
1860 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x000c; in clk_scmi_crypto_pka_s_get_rate()
1861 src = src >> 2; in clk_scmi_crypto_pka_s_get_rate()
1862 switch (src) { in clk_scmi_crypto_pka_s_get_rate()
1878 uint32_t src; in clk_scmi_crypto_pka_s_set_rate() local
1881 src = 0; in clk_scmi_crypto_pka_s_set_rate()
1883 src = 1; in clk_scmi_crypto_pka_s_set_rate()
1885 src = 2; in clk_scmi_crypto_pka_s_set_rate()
1887 src = 3; in clk_scmi_crypto_pka_s_set_rate()
1890 BITS_WITH_WMASK(src, 0x3U, 2)); in clk_scmi_crypto_pka_s_set_rate()