60 #define CLKDIV_6BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x3fU, shift)  argument
61 #define CLKDIV_5BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x1fU, shift)  argument
62 #define CLKDIV_4BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0xfU, shift)  argument
63 #define CLKDIV_3BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x7U, shift)  argument
64 #define CLKDIV_2BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x3U, shift)  argument
65 #define CLKDIV_1BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x1U, shift)  argument
305 	int div;  in clk_cpul_set_rate()  local
346 	div = DIV_ROUND_UP(GPLL_RATE, rate) - 1;  in clk_cpul_set_rate()
348 		      CLKDIV_5BITS_SHF(div, 0) | CLKDIV_5BITS_SHF(div, 7));  in clk_cpul_set_rate()
350 		      CLKDIV_5BITS_SHF(div, 0) | CLKDIV_5BITS_SHF(div, 7));  in clk_cpul_set_rate()
421 	int src, div;  in clk_scmi_cpul_get_rate()  local
430 		div = mmio_read_32(DSUCRU_BASE + CRU_CLKSEL_CON(6)) & 0x1f;  in clk_scmi_cpul_get_rate()
439 				return GPLL_RATE / (div + 1);  in clk_scmi_cpul_get_rate()
474 	int div;  in clk_cpub01_set_rate()  local
515 	div = DIV_ROUND_UP(GPLL_RATE, rate) - 1;  in clk_cpub01_set_rate()
517 		      CLKDIV_5BITS_SHF(div, 8));  in clk_cpub01_set_rate()
519 		      CLKDIV_5BITS_SHF(div, 0));  in clk_cpub01_set_rate()
591 	int value, src, div;  in clk_scmi_cpub01_get_rate()  local
599 		div = (value & 0x1f00) >> 8;  in clk_scmi_cpub01_get_rate()
608 				return GPLL_RATE / (div + 1);  in clk_scmi_cpub01_get_rate()
643 	int div;  in clk_cpub23_set_rate()  local
684 	div = DIV_ROUND_UP(GPLL_RATE, rate) - 1;  in clk_cpub23_set_rate()
686 		      CLKDIV_5BITS_SHF(div, 8));  in clk_cpub23_set_rate()
688 		      CLKDIV_5BITS_SHF(div, 0));  in clk_cpub23_set_rate()
760 	int value, src, div;  in clk_scmi_cpub23_get_rate()  local
768 		div = (value & 0x1f00) >> 8;  in clk_scmi_cpub23_get_rate()
777 				return GPLL_RATE / (div + 1);  in clk_scmi_cpub23_get_rate()
793 	int src, div;  in clk_scmi_dsu_get_rate()  local
801 		div = mmio_read_32(DSUCRU_BASE + CRU_CLKSEL_CON(0)) & 0xf80;  in clk_scmi_dsu_get_rate()
802 		div = div >> 7;  in clk_scmi_dsu_get_rate()
805 			return rk3588_b0pll_get_rate() / (div + 1);  in clk_scmi_dsu_get_rate()
807 			return rk3588_b1pll_get_rate() / (div + 1);  in clk_scmi_dsu_get_rate()
809 			return rk3588_lpll_get_rate() / (div + 1);  in clk_scmi_dsu_get_rate()
811 			return GPLL_RATE / (div + 1);  in clk_scmi_dsu_get_rate()
842 	int div;  in clk_dsu_set_rate()  local
880 	div = DIV_ROUND_UP(GPLL_RATE, rate) - 1;  in clk_dsu_set_rate()
882 		      CLKDIV_5BITS_SHF(div, 7));  in clk_dsu_set_rate()
916 	int div, src;  in clk_scmi_gpu_get_rate()  local
921 		div = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(158)) & 0x1f;  in clk_scmi_gpu_get_rate()
930 				return GPLL_RATE / (div + 1);  in clk_scmi_gpu_get_rate()
932 			return CPLL_RATE / (div + 1);  in clk_scmi_gpu_get_rate()
934 			return AUPLL_RATE / (div + 1);  in clk_scmi_gpu_get_rate()
936 			return NPLL_RATE / (div + 1);  in clk_scmi_gpu_get_rate()
938 			return SPLL_RATE / (div + 1);  in clk_scmi_gpu_get_rate()
948 	int div;  in clk_gpu_set_rate()  local
981 	div = DIV_ROUND_UP(GPLL_RATE, rate);  in clk_gpu_set_rate()
983 		      CLKDIV_5BITS_SHF(div - 1, 0));  in clk_gpu_set_rate()
1014 	int div, src;  in clk_scmi_npu_get_rate()  local
1019 		div = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(73)) & 0x007c;  in clk_scmi_npu_get_rate()
1020 		div = div >> 2;  in clk_scmi_npu_get_rate()
1029 				return GPLL_RATE / (div + 1);  in clk_scmi_npu_get_rate()
1031 			return CPLL_RATE / (div + 1);  in clk_scmi_npu_get_rate()
1033 			return AUPLL_RATE / (div + 1);  in clk_scmi_npu_get_rate()
1035 			return NPLL_RATE / (div + 1);  in clk_scmi_npu_get_rate()
1037 			return SPLL_RATE / (div + 1);  in clk_scmi_npu_get_rate()
1047 	int div;  in clk_npu_set_rate()  local
1080 	div = DIV_ROUND_UP(GPLL_RATE, rate);  in clk_npu_set_rate()
1082 		      CLKDIV_5BITS_SHF(div - 1, 2));  in clk_npu_set_rate()
1113 	int div;  in clk_scmi_sbus_get_rate()  local
1116 		div = mmio_read_32(BUSSCRU_BASE + CRU_CLKSEL_CON(0));  in clk_scmi_sbus_get_rate()
1117 		div = (div & 0x03e0) >> 5;  in clk_scmi_sbus_get_rate()
1118 		return SPLL_RATE / (div + 1);  in clk_scmi_sbus_get_rate()
1126 	int div;  in clk_scmi_sbus_set_rate()  local
1134 	div = DIV_ROUND_UP(SPLL_RATE, rate);  in clk_scmi_sbus_set_rate()
1136 		      CLKDIV_5BITS_SHF(div - 1, 5));  in clk_scmi_sbus_set_rate()
1149 	int div;  in clk_scmi_pclk_sbus_get_rate()  local
1151 	div = mmio_read_32(BUSSCRU_BASE + CRU_CLKSEL_CON(0));  in clk_scmi_pclk_sbus_get_rate()
1152 	div = div & 0x001f;  in clk_scmi_pclk_sbus_get_rate()
1153 	return SPLL_RATE / (div + 1);  in clk_scmi_pclk_sbus_get_rate()
1159 	int div;  in clk_scmi_pclk_sbus_set_rate()  local
1161 	div = DIV_ROUND_UP(SPLL_RATE, rate);  in clk_scmi_pclk_sbus_set_rate()
1163 		      CLKDIV_5BITS_SHF(div - 1, 0));  in clk_scmi_pclk_sbus_set_rate()
1174 	int div;  in clk_scmi_cclk_sdmmc_get_rate()  local
1179 	div = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x0fc0;  in clk_scmi_cclk_sdmmc_get_rate()
1180 	div = div >> 6;  in clk_scmi_cclk_sdmmc_get_rate()
1182 		return SPLL_RATE / (div + 1);  in clk_scmi_cclk_sdmmc_get_rate()
1184 		return OSC_HZ / (div + 1);  in clk_scmi_cclk_sdmmc_get_rate()
1186 		return GPLL_RATE / (div + 1);  in clk_scmi_cclk_sdmmc_get_rate()
1192 	int div;  in clk_scmi_cclk_sdmmc_set_rate()  local
1195 		div = DIV_ROUND_UP(OSC_HZ, rate);  in clk_scmi_cclk_sdmmc_set_rate()
1197 			      CLKDIV_6BITS_SHF(div - 1, 6) |  in clk_scmi_cclk_sdmmc_set_rate()
1200 		div = DIV_ROUND_UP(SPLL_RATE, rate);  in clk_scmi_cclk_sdmmc_set_rate()
1202 			      CLKDIV_6BITS_SHF(div - 1, 6) |  in clk_scmi_cclk_sdmmc_set_rate()
1205 		div = DIV_ROUND_UP(GPLL_RATE, rate);  in clk_scmi_cclk_sdmmc_set_rate()
1207 			      CLKDIV_6BITS_SHF(div - 1, 6) |  in clk_scmi_cclk_sdmmc_set_rate()
1223 	int div;  in clk_scmi_dclk_sdmmc_get_rate()  local
1227 	div = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x001f;  in clk_scmi_dclk_sdmmc_get_rate()
1229 		return SPLL_RATE / (div + 1);  in clk_scmi_dclk_sdmmc_get_rate()
1231 		return GPLL_RATE / (div + 1);  in clk_scmi_dclk_sdmmc_get_rate()
1237 	int div;  in clk_scmi_dclk_sdmmc_set_rate()  local
1240 		div = DIV_ROUND_UP(SPLL_RATE, rate);  in clk_scmi_dclk_sdmmc_set_rate()
1242 			      CLKDIV_5BITS_SHF(div - 1, 0) |  in clk_scmi_dclk_sdmmc_set_rate()
1245 		div = DIV_ROUND_UP(GPLL_RATE, rate);  in clk_scmi_dclk_sdmmc_set_rate()
1247 			      CLKDIV_5BITS_SHF(div - 1, 0) |  in clk_scmi_dclk_sdmmc_set_rate()