Lines Matching refs:SCRU_BASE
1177 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x3000; in clk_scmi_cclk_sdmmc_get_rate()
1179 div = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x0fc0; in clk_scmi_cclk_sdmmc_get_rate()
1196 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(3), in clk_scmi_cclk_sdmmc_set_rate()
1201 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(3), in clk_scmi_cclk_sdmmc_set_rate()
1206 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(3), in clk_scmi_cclk_sdmmc_set_rate()
1216 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(3), in clk_scmi_cclk_sdmmc_set_status()
1226 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x0020; in clk_scmi_dclk_sdmmc_get_rate()
1227 div = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(3)) & 0x001f; in clk_scmi_dclk_sdmmc_get_rate()
1241 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(3), in clk_scmi_dclk_sdmmc_set_rate()
1246 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(3), in clk_scmi_dclk_sdmmc_set_rate()
1255 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(3), in clk_scmi_dclk_sdmmc_set_status()
1264 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0003; in clk_scmi_aclk_secure_ns_get_rate()
1292 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_aclk_secure_ns_set_rate()
1307 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x000c; in clk_scmi_hclk_secure_ns_get_rate()
1336 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_hclk_secure_ns_set_rate()
1353 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(2), in clk_scmi_tclk_wdt_set_status()
1362 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x00c0; in clk_scmi_keyladder_core_get_rate()
1391 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(2), in clk_scmi_keyladder_core_set_rate()
1398 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_keyladder_core_set_status()
1407 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x0300; in clk_scmi_keyladder_rng_get_rate()
1436 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(2), in clk_scmi_keyladder_rng_set_rate()
1443 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_keyladder_rng_set_status()
1452 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0030; in clk_scmi_aclk_secure_s_get_rate()
1481 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_aclk_secure_s_set_rate()
1495 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x00c0; in clk_scmi_hclk_secure_s_get_rate()
1524 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_hclk_secure_s_set_rate()
1538 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0300; in clk_scmi_pclk_secure_s_get_rate()
1563 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_pclk_secure_s_set_rate()
1577 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0xc000; in clk_scmi_crypto_rng_get_rate()
1606 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_crypto_rng_set_rate()
1613 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_crypto_rng_set_status()
1623 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x0c00; in clk_scmi_crypto_core_get_rate()
1652 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_crypto_core_set_rate()
1659 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(0), in clk_scmi_crypto_core_set_status()
1669 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(1)) & 0x3000; in clk_scmi_crypto_pka_get_rate()
1698 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(1), in clk_scmi_crypto_pka_set_rate()
1705 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_crypto_pka_set_status()
1759 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(3), in clk_scmi_hclk_sd_set_status()
1768 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x0030; in clk_scmi_crypto_rng_s_get_rate()
1797 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(2), in clk_scmi_crypto_rng_s_set_rate()
1804 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_crypto_rng_s_set_status()
1814 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x3; in clk_scmi_crypto_core_s_get_rate()
1843 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(2), in clk_scmi_crypto_core_s_set_rate()
1850 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_crypto_core_s_set_status()
1860 src = mmio_read_32(SCRU_BASE + CRU_CLKSEL_CON(2)) & 0x000c; in clk_scmi_crypto_pka_s_get_rate()
1889 mmio_write_32(SCRU_BASE + CRU_CLKSEL_CON(2), in clk_scmi_crypto_pka_s_set_rate()
1896 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_crypto_pka_s_set_status()
1914 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_a_crypto_s_set_status()
1932 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_h_crypto_s_set_status()
1950 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(2), in clk_scmi_p_crypto_s_set_status()
1968 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_a_keylad_s_set_status()
1986 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_h_keylad_s_set_status()
2004 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(2), in clk_scmi_p_keylad_s_set_status()
2022 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(3), in clk_scmi_trng_s_set_status()
2040 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(2), in clk_scmi_h_trng_s_set_status()
2058 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_p_otpc_s_set_status()
2071 mmio_write_32(SCRU_BASE + CRU_CLKGATE_CON(1), in clk_scmi_otpc_s_set_status()