Lines Matching refs:CRU_BASE
918 if ((mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(158)) & 0x4000) != 0) { in clk_scmi_gpu_get_rate()
921 div = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(158)) & 0x1f; in clk_scmi_gpu_get_rate()
922 src = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(158)) & 0x00e0; in clk_scmi_gpu_get_rate()
975 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(158), in clk_gpu_set_rate()
982 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(158), in clk_gpu_set_rate()
985 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(158), in clk_gpu_set_rate()
987 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(158), in clk_gpu_set_rate()
1016 if ((mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(74)) & 0x1) != 0) { in clk_scmi_npu_get_rate()
1019 div = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(73)) & 0x007c; in clk_scmi_npu_get_rate()
1021 src = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(73)) & 0x0380; in clk_scmi_npu_get_rate()
1074 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(74), in clk_npu_set_rate()
1081 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(73), in clk_npu_set_rate()
1084 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(73), in clk_npu_set_rate()
1086 mmio_write_32(CRU_BASE + CRU_CLKSEL_CON(74), in clk_npu_set_rate()
2083 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in clk_scmi_otp_phy_set_status()
2095 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in clk_scmi_otpc_rd_set_status()
2107 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(18), in clk_scmi_otpc_arb_set_status()