Lines Matching refs:otp_base
137 static int check_sbpi_done_int(uint32_t otp_base) in check_sbpi_done_int() argument
144 if (((mmio_read_32(otp_base + REG_OTPC_INT_STATUS) >> 1) & 0x01) == 0x01) { in check_sbpi_done_int()
145 mmio_write_32(otp_base + REG_OTPC_INT_STATUS, in check_sbpi_done_int()
164 uint32_t otp_base = 0; in otp_select() local
167 otp_base = OTP_S_BASE; in otp_select()
172 otp_base = OTP_NS_BASE; in otp_select()
177 return otp_base; in otp_select()
180 static int rk_otp_ecc_enable(uint32_t otp_base, bool enable) in rk_otp_ecc_enable() argument
182 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_ecc_enable()
185 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_VALID_PRE, SBPI_VAILI_COMMAND(1)); in rk_otp_ecc_enable()
191 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(0), 0xfa); /* sbpi cmd */ in rk_otp_ecc_enable()
194 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(1), in rk_otp_ecc_enable()
197 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(1), in rk_otp_ecc_enable()
200 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_ecc_enable()
203 if (check_sbpi_done_int(otp_base)) in rk_otp_ecc_enable()
211 uint32_t otp_base = 0; in rk_otp_sbpi_read() local
214 otp_base = otp_select(addr); in rk_otp_sbpi_read()
226 mmio_write_32(otp_base + REG_OTPC_USER_CTRL, USER_DCTRL << WRITE_MASK); in rk_otp_sbpi_read()
229 rk_otp_ecc_enable(otp_base, is_need_ecc); in rk_otp_sbpi_read()
231 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_sbpi_read()
233 mmio_write_32(otp_base + REG_OTPC_SBPI_CS_VALID_PRE, in rk_otp_sbpi_read()
236 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_sbpi_read()
239 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_VALID_PRE, SBPI_VAILI_COMMAND(2)); in rk_otp_sbpi_read()
245 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(0), 0xfc); /* sbpi cmd */ in rk_otp_sbpi_read()
246 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(1), addr & 0xff); /* sbpi cmd 3c addr */ in rk_otp_sbpi_read()
247 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(2), in rk_otp_sbpi_read()
249 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_sbpi_read()
252 if (check_sbpi_done_int(otp_base)) in rk_otp_sbpi_read()
256 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_VALID_PRE, SBPI_VAILI_COMMAND(7)); in rk_otp_sbpi_read()
262 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(0), 0x00); in rk_otp_sbpi_read()
263 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(1), 0x00); in rk_otp_sbpi_read()
264 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(2), 0x40); in rk_otp_sbpi_read()
265 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(3), 0x40); in rk_otp_sbpi_read()
266 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(4), 0x00); in rk_otp_sbpi_read()
267 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(5), 0x02); in rk_otp_sbpi_read()
268 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(6), 0x80); in rk_otp_sbpi_read()
269 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(7), 0x81); in rk_otp_sbpi_read()
271 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_sbpi_read()
274 if (check_sbpi_done_int(otp_base)) in rk_otp_sbpi_read()
278 otp_qp = mmio_read_32(otp_base + REG_OTPC_USER_QP); in rk_otp_sbpi_read()
287 (uint16_t)mmio_read_32(otp_base + REG_OTPC_SBPI_READ_DATA_BASE + 0x20); in rk_otp_sbpi_read()
289 (uint16_t)(mmio_read_32(otp_base + REG_OTPC_SBPI_READ_DATA_BASE + 0x24) << 8); in rk_otp_sbpi_read()
291 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_VALID_PRE, SBPI_VAILI_COMMAND(1)); in rk_otp_sbpi_read()
297 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(0), 0xa0); in rk_otp_sbpi_read()
298 mmio_write_32(otp_base + REG_OTPC_SBPI_CMD_OFFSET(1), 0x0); in rk_otp_sbpi_read()
299 mmio_write_32(otp_base + REG_OTPC_SBPI_CTRL, in rk_otp_sbpi_read()
302 if (check_sbpi_done_int(otp_base)) in rk_otp_sbpi_read()
305 mmio_write_32(otp_base + REG_OTPC_INT_STATUS, 0xffff0003); /* clear sbpi INT */ in rk_otp_sbpi_read()