Lines Matching refs:mmio_write_32

21 		mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16),  in sgrf_ddr_rgn_global_bypass()
25 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16), in sgrf_ddr_rgn_global_bypass()
74 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(rgn), in sgrf_ddr_rgn_config()
78 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(rgn + 8), in sgrf_ddr_rgn_config()
81 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16), in sgrf_ddr_rgn_config()
92 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), in secure_watchdog_gate()
104 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), in secure_watchdog_ungate()
111 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT0, 0xffffffff); in sram_secure_timer_init()
112 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT1, 0xffffffff); in sram_secure_timer_init()
114 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0); in sram_secure_timer_init()
115 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0); in sram_secure_timer_init()
118 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_CONTROL_REG, in sram_secure_timer_init()
124 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT0, 0xffffffff); in secure_timer_init()
125 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT1, 0xffffffff); in secure_timer_init()
127 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0); in secure_timer_init()
128 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0); in secure_timer_init()
131 mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_CONTROL_REG, in secure_timer_init()
138 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(5), in secure_sgrf_init()
140 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), in secure_sgrf_init()
142 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(7), in secure_sgrf_init()
146 mmio_write_32(SGRF_BASE + SGRF_PMU_SLV_CON0_1(0), in secure_sgrf_init()
149 mmio_write_32(SGRF_BASE + SGRF_PMU_SLV_CON0_1(1), in secure_sgrf_init()
151 mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(0), in secure_sgrf_init()
153 mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(1), in secure_sgrf_init()
155 mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(2), in secure_sgrf_init()
157 mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(3), in secure_sgrf_init()
159 mmio_write_32(SGRF_BASE + SGRF_SLV_SECURE_CON0_4(4), in secure_sgrf_init()