Lines Matching refs:CRU_BASE
528 mmio_write_32(CRU_BASE + (con), ((msk) << 16) | 0xffff)
530 mmio_write_32(CRU_BASE + (con), ((~(msk)) << 16) | 0xffff)
550 mmio_read_32(CRU_BASE + CRU_CLKGATES_CON(i)); in clk_gate_suspend()
551 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_suspend()
572 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_resume()
875 mmio_write_32(CRU_BASE + CRU_MODE, val); in pll_set_mode()
887 pll_base = CRU_BASE + CRU_PLL_CONS(pll_id, 0); in pll_suspend()
905 pll_base = CRU_BASE + CRU_PLL_CONS(pll_id, 0); in pll_resume()
921 ddr_data.cru_mode_save = mmio_read_32(CRU_BASE + CRU_MODE); in pm_plls_suspend()
923 ddr_data.clk_sel0 = mmio_read_32(CRU_BASE + CRU_CLKSELS_CON(0)); in pm_plls_suspend()
931 mmio_write_32(CRU_BASE + CRU_CLKSELS_CON(0), in pm_plls_suspend()
935 mmio_write_32(CRU_BASE + CRU_CLKSELS_CON(0), in pm_plls_suspend()
942 mmio_write_32(CRU_BASE + CRU_CLKSELS_CON(0), in pm_plls_resume()
946 mmio_write_32(CRU_BASE + CRU_CLKSELS_CON(0), in pm_plls_resume()
995 mmio_write_32(CRU_BASE + CRU_GLB_SRST_FST, CRU_GLB_SRST_FST_VALUE); in rockchip_soc_soft_reset()