Lines Matching refs:r1
38 ldr r1, =BLSP_UART_BASE
52 ldr r1, =BLSP_UART_BASE
64 ldr r1, =BLSP_UART_BASE
76 mov r1, #0
77 str r1, [r0]
88 ldcopr r1, MPIDR
89 and r0, r1, #MPIDR_CPU_MASK
91 and r1, r1, #MPIDR_CLUSTER_MASK
92 orr r0, r0, r1, LSR #(MPIDR_AFFINITY_BITS - \
119 ldr r1, =APCS_CFG(0)
120 ldr r2, [r1, #APCS_TCM_START_ADDR]
122 str r2, [r1, #APCS_TCM_START_ADDR]