Lines Matching refs:w4
1492 rev w4, w3
1493 orr w4, w4, w2
1494 rev w3, w4
1497 rev w4, w3
1498 str w4, [x7, #RCPM2_IPSTPCR4_OFFSET] /* quiesce ddr clocks - end */
1514 rev w4, w5
1515 str w4, [x7, #RCPM2_IPSTPCR4_OFFSET] /* re-enable ddr clks interface */
1519 str w4, [x8, #DCFG_DEVDISR5_OFFSET] /* disable ddr cntrlr clk in devdisr5 */
1524 rev w4, w5
1525 str w4, [x8, #DCFG_DEVDISR5_OFFSET] /* re-enable ddr in devdisr5 */
1526 str w4, [x7, #RCPM2_IPSTPCR4_OFFSET] /* re-enable ddr clk in ipstpcr4 */
1539 rev w4, w3
1540 bic w4, w4, w2
1541 rev w3, w4
1604 rev w4, w3
1605 orr w4, w4, w2
1606 rev w3, w4
1609 rev w4, w3
1610 str w4, [x7, #RCPM2_IPSTPCR4_OFFSET] /* quiesce ddr clocks - end */
1629 str w4, [x8, #DCFG_DEVDISR5_OFFSET] /* disable ddr cntrlr clk in devdisr5 */