Lines Matching refs:reg_id
41 uint8_t reg_id = 0U; in populate_dram_regions_info() local
43 dram_regions_info.region[reg_id].addr = NXP_DRAM0_ADDR; in populate_dram_regions_info()
44 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
48 if (dram_regions_info.region[reg_id].size != NXP_DRAM0_SIZE) { in populate_dram_regions_info()
52 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
53 dram_regions_info.region[reg_id].size -= (NXP_SECURE_DRAM_SIZE in populate_dram_regions_info()
56 assert(dram_regions_info.region[reg_id].size > 0); in populate_dram_regions_info()
64 reg_id++; in populate_dram_regions_info()
65 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
66 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
69 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
74 reg_id++; in populate_dram_regions_info()
75 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
76 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
79 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
82 reg_id++; in populate_dram_regions_info()
83 dram_regions_info.num_dram_regions = reg_id; in populate_dram_regions_info()