18 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu)  in mcucfg_disable_gic_wakeup()  argument
20 	mmio_setbits_32(MCUCFG_CPC_FLOW_CTRL_CFG, GIC_WAKEUP_IGNORE(cpu));  in mcucfg_disable_gic_wakeup()
23 void mcucfg_enable_gic_wakeup(unsigned int cluster, unsigned int cpu)  in mcucfg_enable_gic_wakeup()  argument
25 	mmio_clrbits_32(MCUCFG_CPC_FLOW_CTRL_CFG, GIC_WAKEUP_IGNORE(cpu));  in mcucfg_enable_gic_wakeup()
28 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr)  in mcucfg_set_bootaddr()  argument
32 	mmio_write_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR), bootaddr);  in mcucfg_set_bootaddr()
35 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu)  in mcucfg_get_bootaddr()  argument
39 	return (uintptr_t)mmio_read_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR));  in mcucfg_get_bootaddr()
42 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64)  in mcucfg_init_archstate()  argument
51 		mmio_setbits_32(reg, MCUCFG_INITARCH_CPU_BIT(cpu));  in mcucfg_init_archstate()
53 		mmio_clrbits_32(reg, MCUCFG_INITARCH_CPU_BIT(cpu));  in mcucfg_init_archstate()
78 bool spm_get_cpu_powerstate(unsigned int cluster, unsigned int cpu)  in spm_get_cpu_powerstate()  argument
80 	uint32_t mask = BIT(cpu);  in spm_get_cpu_powerstate()
117 void spm_poweron_cpu(unsigned int cluster, unsigned int cpu)  in spm_poweron_cpu()  argument
119 	uintptr_t cpu_pwr_con = per_cpu(cluster, cpu, SPM_CPU_PWR);  in spm_poweron_cpu()
122 	if (cpu >= 4U) {  in spm_poweron_cpu()
128 	while (!spm_get_cpu_powerstate(cluster, cpu)) {  in spm_poweron_cpu()
140 void spm_poweroff_cpu(unsigned int cluster, unsigned int cpu)  in spm_poweroff_cpu()  argument
143 	mmio_clrbits_32(per_cpu(cluster, cpu, SPM_CPU_PWR), PWR_ON);  in spm_poweroff_cpu()