Lines Matching refs:domain
115 int32_t apupwr_smc_acc_set_parent(uint32_t freq, uint32_t domain) in apupwr_smc_acc_set_parent() argument
127 switch (domain) { in apupwr_smc_acc_set_parent()
134 acc_set = aacc_set[domain]; in apupwr_smc_acc_set_parent()
135 acc_clr = aacc_clr[domain]; in apupwr_smc_acc_set_parent()
200 int32_t apupwr_smc_pll_set_rate(uint32_t freq, bool div2, uint32_t domain) in apupwr_smc_pll_set_rate() argument
215 switch (domain) { in apupwr_smc_pll_set_rate()
246 __func__, __LINE__, domain); in apupwr_smc_pll_set_rate()
251 anpu_pll_set_rate(domain, PLL_MODE, (div2) ? (freq * 2) : freq); in apupwr_smc_pll_set_rate()
265 switch (domain) { in apupwr_smc_pll_set_rate()
297 domain); in apupwr_smc_pll_set_rate()
302 __func__, __LINE__, domain); in apupwr_smc_pll_set_rate()
307 __func__, __LINE__, domain, (div2) ? (freq * 2) : freq); in apupwr_smc_pll_set_rate()