Lines Matching refs:MCUCFG_REG
31 #define MCUCFG_REG(ofs) (uint32_t)(MCUCFG_BASE + (ofs)) macro
97 #define MCUCFG_MP0_CLUSTER_CFG5 MCUCFG_REG(0xc8e4)
99 #define MCUCFG_MP0_CLUSTER_CFG8 MCUCFG_REG(0xc900)
100 #define MCUCFG_MP0_CLUSTER_CFG10 MCUCFG_REG(0xc908)
101 #define MCUCFG_MP0_CLUSTER_CFG12 MCUCFG_REG(0xc910)
102 #define MCUCFG_MP0_CLUSTER_CFG14 MCUCFG_REG(0xc918)
103 #define MCUCFG_MP0_CLUSTER_CFG16 MCUCFG_REG(0xc920)
104 #define MCUCFG_MP0_CLUSTER_CFG18 MCUCFG_REG(0xc928)
105 #define MCUCFG_MP0_CLUSTER_CFG20 MCUCFG_REG(0xc930)
106 #define MCUCFG_MP0_CLUSTER_CFG22 MCUCFG_REG(0xc938)
120 #define MCUCFG_CPC_FLOW_CTRL_CFG MCUCFG_REG(0xa814)
121 #define MCUCFG_CPC_SPMC_PWR_STATUS MCUCFG_REG(0xa840)
151 #define PTP3_CPU0_SPMC_SW_CFG MCUCFG_REG(0x200)
152 #define CPU0_ILDO_CONTROL5 MCUCFG_REG(0x334)
153 #define CPU0_ILDO_CONTROL8 MCUCFG_REG(0x340)