Lines Matching refs:pwrctrl
109 void spm_set_power_control(const struct pwr_ctrl *pwrctrl) in spm_set_power_control() argument
112 ((pwrctrl->wfi_op & 0x1) << 0) | in spm_set_power_control()
113 ((pwrctrl->mp0_cputop_idle_mask & 0x1) << 1) | in spm_set_power_control()
114 ((pwrctrl->mp1_cputop_idle_mask & 0x1) << 2) | in spm_set_power_control()
115 ((pwrctrl->mcusys_idle_mask & 0x1) << 4) | in spm_set_power_control()
116 ((pwrctrl->mm_mask_b & 0x3) << 16) | in spm_set_power_control()
117 ((pwrctrl->md_ddr_en_0_dbc_en & 0x1) << 18) | in spm_set_power_control()
118 ((pwrctrl->md_ddr_en_1_dbc_en & 0x1) << 19) | in spm_set_power_control()
119 ((pwrctrl->md_mask_b & 0x3) << 20) | in spm_set_power_control()
120 ((pwrctrl->sspm_mask_b & 0x1) << 22) | in spm_set_power_control()
121 ((pwrctrl->scp_mask_b & 0x1) << 23) | in spm_set_power_control()
122 ((pwrctrl->srcclkeni_mask_b & 0x1) << 24) | in spm_set_power_control()
123 ((pwrctrl->md_apsrc_1_sel & 0x1) << 25) | in spm_set_power_control()
124 ((pwrctrl->md_apsrc_0_sel & 0x1) << 26) | in spm_set_power_control()
125 ((pwrctrl->conn_ddr_en_dbc_en & 0x1) << 27) | in spm_set_power_control()
126 ((pwrctrl->conn_mask_b & 0x1) << 28) | in spm_set_power_control()
127 ((pwrctrl->conn_apsrc_sel & 0x1) << 29)); in spm_set_power_control()
130 ((pwrctrl->spm_apsrc_req & 0x1) << 0) | in spm_set_power_control()
131 ((pwrctrl->spm_f26m_req & 0x1) << 1) | in spm_set_power_control()
132 ((pwrctrl->spm_infra_req & 0x1) << 3) | in spm_set_power_control()
133 ((pwrctrl->spm_vrf18_req & 0x1) << 4) | in spm_set_power_control()
134 ((pwrctrl->spm_ddren_req & 0x1) << 7) | in spm_set_power_control()
135 ((pwrctrl->spm_rsv_src_req & 0x7) << 8) | in spm_set_power_control()
136 ((pwrctrl->spm_ddren_2_req & 0x1) << 11) | in spm_set_power_control()
137 ((pwrctrl->cpu_md_dvfs_sop_force_on & 0x1) << 16)); in spm_set_power_control()
140 ((pwrctrl->csyspwreq_mask & 0x1) << 0) | in spm_set_power_control()
141 ((pwrctrl->ccif0_md_event_mask_b & 0x1) << 1) | in spm_set_power_control()
142 ((pwrctrl->ccif0_ap_event_mask_b & 0x1) << 2) | in spm_set_power_control()
143 ((pwrctrl->ccif1_md_event_mask_b & 0x1) << 3) | in spm_set_power_control()
144 ((pwrctrl->ccif1_ap_event_mask_b & 0x1) << 4) | in spm_set_power_control()
145 ((pwrctrl->ccif2_md_event_mask_b & 0x1) << 5) | in spm_set_power_control()
146 ((pwrctrl->ccif2_ap_event_mask_b & 0x1) << 6) | in spm_set_power_control()
147 ((pwrctrl->ccif3_md_event_mask_b & 0x1) << 7) | in spm_set_power_control()
148 ((pwrctrl->ccif3_ap_event_mask_b & 0x1) << 8) | in spm_set_power_control()
149 ((pwrctrl->md_srcclkena_0_infra_mask_b & 0x1) << 9) | in spm_set_power_control()
150 ((pwrctrl->md_srcclkena_1_infra_mask_b & 0x1) << 10) | in spm_set_power_control()
151 ((pwrctrl->conn_srcclkena_infra_mask_b & 0x1) << 11) | in spm_set_power_control()
152 ((pwrctrl->ufs_infra_req_mask_b & 0x1) << 12) | in spm_set_power_control()
153 ((pwrctrl->srcclkeni_infra_mask_b & 0x1) << 13) | in spm_set_power_control()
154 ((pwrctrl->md_apsrc_req_0_infra_mask_b & 0x1) << 14) | in spm_set_power_control()
155 ((pwrctrl->md_apsrc_req_1_infra_mask_b & 0x1) << 15) | in spm_set_power_control()
156 ((pwrctrl->conn_apsrcreq_infra_mask_b & 0x1) << 16) | in spm_set_power_control()
157 ((pwrctrl->ufs_srcclkena_mask_b & 0x1) << 17) | in spm_set_power_control()
158 ((pwrctrl->md_vrf18_req_0_mask_b & 0x1) << 18) | in spm_set_power_control()
159 ((pwrctrl->md_vrf18_req_1_mask_b & 0x1) << 19) | in spm_set_power_control()
160 ((pwrctrl->ufs_vrf18_req_mask_b & 0x1) << 20) | in spm_set_power_control()
161 ((pwrctrl->gce_vrf18_req_mask_b & 0x1) << 21) | in spm_set_power_control()
162 ((pwrctrl->conn_infra_req_mask_b & 0x1) << 22) | in spm_set_power_control()
163 ((pwrctrl->gce_apsrc_req_mask_b & 0x1) << 23) | in spm_set_power_control()
164 ((pwrctrl->disp0_apsrc_req_mask_b & 0x1) << 24) | in spm_set_power_control()
165 ((pwrctrl->disp1_apsrc_req_mask_b & 0x1) << 25) | in spm_set_power_control()
166 ((pwrctrl->mfg_req_mask_b & 0x1) << 26) | in spm_set_power_control()
167 ((pwrctrl->vdec_req_mask_b & 0x1) << 27)); in spm_set_power_control()
170 ((pwrctrl->md_ddr_en_0_mask_b & 0x1) << 0) | in spm_set_power_control()
171 ((pwrctrl->md_ddr_en_1_mask_b & 0x1) << 1) | in spm_set_power_control()
172 ((pwrctrl->conn_ddr_en_mask_b & 0x1) << 2) | in spm_set_power_control()
173 ((pwrctrl->ddren_sspm_apsrc_req_mask_b & 0x1) << 3) | in spm_set_power_control()
174 ((pwrctrl->ddren_scp_apsrc_req_mask_b & 0x1) << 4) | in spm_set_power_control()
175 ((pwrctrl->disp0_ddren_mask_b & 0x1) << 5) | in spm_set_power_control()
176 ((pwrctrl->disp1_ddren_mask_b & 0x1) << 6) | in spm_set_power_control()
177 ((pwrctrl->gce_ddren_mask_b & 0x1) << 7) | in spm_set_power_control()
178 ((pwrctrl->ddren_emi_self_refresh_ch0_mask_b & 0x1) in spm_set_power_control()
180 ((pwrctrl->ddren_emi_self_refresh_ch1_mask_b & 0x1) in spm_set_power_control()
184 ((pwrctrl->spm_wakeup_event_mask & 0xffffffff) << 0)); in spm_set_power_control()
187 ((pwrctrl->spm_wakeup_event_ext_mask & 0xffffffff) in spm_set_power_control()
191 ((pwrctrl->md_ddr_en_2_0_mask_b & 0x1) << 0) | in spm_set_power_control()
192 ((pwrctrl->md_ddr_en_2_1_mask_b & 0x1) << 1) | in spm_set_power_control()
193 ((pwrctrl->conn_ddr_en_2_mask_b & 0x1) << 2) | in spm_set_power_control()
194 ((pwrctrl->ddren2_sspm_apsrc_req_mask_b & 0x1) << 3) | in spm_set_power_control()
195 ((pwrctrl->ddren2_scp_apsrc_req_mask_b & 0x1) << 4) | in spm_set_power_control()
196 ((pwrctrl->disp0_ddren2_mask_b & 0x1) << 5) | in spm_set_power_control()
197 ((pwrctrl->disp1_ddren2_mask_b & 0x1) << 6) | in spm_set_power_control()
198 ((pwrctrl->gce_ddren2_mask_b & 0x1) << 7) | in spm_set_power_control()
199 ((pwrctrl->ddren2_emi_self_refresh_ch0_mask_b & 0x1) in spm_set_power_control()
201 ((pwrctrl->ddren2_emi_self_refresh_ch1_mask_b & 0x1) in spm_set_power_control()
205 ((pwrctrl->mp0_cpu0_wfi_en & 0x1) << 0)); in spm_set_power_control()
207 ((pwrctrl->mp0_cpu1_wfi_en & 0x1) << 0)); in spm_set_power_control()
209 ((pwrctrl->mp0_cpu2_wfi_en & 0x1) << 0)); in spm_set_power_control()
211 ((pwrctrl->mp0_cpu3_wfi_en & 0x1) << 0)); in spm_set_power_control()
214 ((pwrctrl->mp1_cpu0_wfi_en & 0x1) << 0)); in spm_set_power_control()
216 ((pwrctrl->mp1_cpu1_wfi_en & 0x1) << 0)); in spm_set_power_control()
218 ((pwrctrl->mp1_cpu2_wfi_en & 0x1) << 0)); in spm_set_power_control()
220 ((pwrctrl->mp1_cpu3_wfi_en & 0x1) << 0)); in spm_set_power_control()
228 void spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl) in spm_set_wakeup_event() argument
232 val = pwrctrl->timer_val ? pwrctrl->timer_val : PCM_TIMER_MAX; in spm_set_wakeup_event()
236 mask = pwrctrl->wake_src; in spm_set_wakeup_event()
238 if (pwrctrl->csyspwreq_mask) in spm_set_wakeup_event()
247 void spm_set_pcm_flags(const struct pwr_ctrl *pwrctrl) in spm_set_pcm_flags() argument
249 mmio_write_32(SPM_SW_FLAG, pwrctrl->pcm_flags); in spm_set_pcm_flags()
250 mmio_write_32(SPM_SW_RSV_2, pwrctrl->pcm_flags1); in spm_set_pcm_flags()