Lines Matching refs:BIT
22 #define MP2_CPU0_STANDBYWFE BIT(4)
23 #define MP2_CPU1_STANDBYWFE BIT(5)
29 #define sw_spark_en BIT(0)
30 #define sw_no_wait_for_q_channel BIT(1)
31 #define sw_fsm_override BIT(2)
32 #define sw_logic_pre1_pdb BIT(3)
33 #define sw_logic_pre2_pdb BIT(4)
34 #define sw_logic_pdb BIT(5)
35 #define sw_iso BIT(6)
37 #define sw_sram_isointb BIT(13)
38 #define sw_clk_dis BIT(14)
39 #define sw_ckiso BIT(15)
41 #define sw_hot_plug_reset BIT(22)
42 #define sw_pwr_on_override_en BIT(23)
43 #define sw_pwr_on BIT(24)
44 #define sw_coq_dis BIT(25)
45 #define logic_pdbo_all_off_ack BIT(26)
46 #define logic_pdbo_all_on_ack BIT(27)
47 #define logic_pre2_pdbo_all_on_ack BIT(28)
48 #define logic_pre1_pdbo_all_on_ack BIT(29)
63 #define cpu_sw_spark_en BIT(0)
64 #define cpu_sw_no_wait_for_q_channel BIT(1)
65 #define cpu_sw_fsm_override BIT(2)
66 #define cpu_sw_logic_pre1_pdb BIT(3)
67 #define cpu_sw_logic_pre2_pdb BIT(4)
68 #define cpu_sw_logic_pdb BIT(5)
69 #define cpu_sw_iso BIT(6)
70 #define cpu_sw_sram_sleepb BIT(7)
71 #define cpu_sw_sram_isointb BIT(8)
72 #define cpu_sw_clk_dis BIT(9)
73 #define cpu_sw_ckiso BIT(10)
75 #define cpu_sw_hot_plug_reset BIT(16)
76 #define cpu_sw_powr_on_override_en BIT(17)
77 #define cpu_sw_pwr_on BIT(18)
78 #define cpu_spark2ldo_allswoff BIT(19)
79 #define cpu_pdbo_all_on_ack BIT(20)
80 #define cpu_pre2_pdbo_allon_ack BIT(21)
81 #define cpu_pre1_pdbo_allon_ack BIT(22)
111 #define CPC_CTRL_ENABLE BIT(16)
113 #define SSPM_ALL_PWR_CTRL_EN BIT(13)
115 #define SSPM_ALL_PWR_CTRL_EN BIT(17)
117 #define GIC_WAKEUP_IGNORE(cpu) BIT(21 + (cpu))
119 #define CPC_MCUSYS_CPC_RESET_ON_KEEP_ON BIT(17)
120 #define CPC_MCUSYS_CPC_RESET_PWR_ON_EN BIT(20)
138 #define PWR_ON_ACK BIT(31)
139 #define VPROC_EXT_OFF BIT(7)
140 #define DORMANT_EN BIT(6)
141 #define RESETPWRON_CONFIG BIT(5)
142 #define PWR_CLK_DIS BIT(4)
143 #define PWR_ON BIT(2)
144 #define PWR_RST_B BIT(0)
178 #define MP2_AXI_CONFIG_ACINACTM BIT(0)
179 #define MP2_AXI_CONFIG_AINACTS BIT(4)
181 #define MPx_AXI_CONFIG_ACINACTM BIT(4)
182 #define MPx_AXI_CONFIG_AINACTS BIT(5)
184 #define MPx_CA7_MISC_CONFIG_standbywfil2 BIT(28)
186 #define MP0_CPU0_STANDBYWFE BIT(20)
187 #define MP0_CPU1_STANDBYWFE BIT(21)
188 #define MP0_CPU2_STANDBYWFE BIT(22)
189 #define MP0_CPU3_STANDBYWFE BIT(23)
191 #define MP1_CPU0_STANDBYWFE BIT(20)
192 #define MP1_CPU1_STANDBYWFE BIT(21)
193 #define MP1_CPU2_STANDBYWFE BIT(22)
194 #define MP1_CPU3_STANDBYWFE BIT(23)
208 #define MP2_COQ_SW_DIS BIT(0)
222 #define MP2_SW_RST_B BIT(0)
223 #define MP2_TOPAON_APB_MASK BIT(1)
225 #define B_SW_HOT_PLUG_RESET BIT(30)
233 #define B_SW_SRAM_ISOINTB BIT(9)
234 #define B_SW_ISO BIT(8)
235 #define B_SW_LOGIC_PDB BIT(7)
236 #define B_SW_LOGIC_PRE2_PDB BIT(6)
237 #define B_SW_LOGIC_PRE1_PDB BIT(5)
238 #define B_SW_FSM_OVERRIDE BIT(4)
239 #define B_SW_PWR_ON BIT(3)
240 #define B_SW_PWR_ON_OVERRIDE_EN BIT(2)
244 #define B_SW_LOGIC_PDBO_ALL_OFF_ACK BIT(5)
245 #define B_SW_LOGIC_PDBO_ALL_ON_ACK BIT(4)
246 #define B_SW_LOGIC_PRE2_PDBO_ALL_ON_ACK BIT(3)
247 #define B_SW_LOGIC_PRE1_PDBO_ALL_ON_ACK BIT(2)
283 MP1_AINACTS = BIT(MP1_AINACTS_SHIFT)
288 MP1_SW_CG_GEN = BIT(MP1_SW_CG_GEN_SHIFT)
293 MP1_L2RSTDISABLE = BIT(MP1_L2RSTDISABLE_SHIFT)