23 		.base = MMINFRA_HW_VOTER_BASE,
31 		.base = SPM_BASE,
49 static int spm_semaphore_get(uint32_t base, uint32_t set_val)  in spm_semaphore_get()  argument
54 	val = mmio_read_32(base);  in spm_semaphore_get()
57 			    base, val, set_val);  in spm_semaphore_get()
62 		mmio_write_32(base, set_val);  in spm_semaphore_get()
64 		if ((mmio_read_32(base) & set_val) == set_val)  in spm_semaphore_get()
69 	mminfra_err("timeout! base:0x%x, set_val:0x%x\n", base, set_val);  in spm_semaphore_get()
73 static int spm_semaphore_release(uint32_t base, uint32_t set_val)  in spm_semaphore_release()  argument
78 	val = mmio_read_32(base);  in spm_semaphore_release()
81 			    base, val, set_val);  in spm_semaphore_release()
85 		mmio_write_32(base, set_val);  in spm_semaphore_release()
88 			if ((mmio_read_32(base) & set_val) != set_val)  in spm_semaphore_release()
90 			mminfra_err("timeout! base:0x%x, set_val:0x%x\n", base, set_val);  in spm_semaphore_release()
93 	} while ((mmio_read_32(base) & set_val) == set_val);  in spm_semaphore_release()
106 		ret = spm_semaphore_get(hw_sema->base + hw_sema->offset, hw_sema->set_val);  in mminfra_hw_sema_ctrl()
108 		ret = spm_semaphore_release(hw_sema->base + hw_sema->offset, hw_sema->set_val);  in mminfra_hw_sema_ctrl()
112 			mminfra_err("0x%x=0x%x\n", hw_sema->base + hw_sema->offset_all[i],  in mminfra_hw_sema_ctrl()
113 				    mmio_read_32(hw_sema->base + hw_sema->offset_all[i]));  in mminfra_hw_sema_ctrl()
138 		mmio_write_32(hw_voter->base + vote_ofs, vote_mask);  in mminfra_hwv_power_ctrl()
140 		val = mmio_read_32(hw_voter->base + hw_voter->en_ofs);  in mminfra_hwv_power_ctrl()
146 				    is_on, hw_voter->base + hw_voter->en_ofs, val);  in mminfra_hwv_power_ctrl()