37 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x4),  in mt_irq_mask_restore()
39 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x8),  in mt_irq_mask_restore()
41 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0xc),  in mt_irq_mask_restore()
43 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x10),  in mt_irq_mask_restore()
45 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x14),  in mt_irq_mask_restore()
47 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x18),  in mt_irq_mask_restore()
49 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x1c),  in mt_irq_mask_restore()
51 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x20),  in mt_irq_mask_restore()
53 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x24),  in mt_irq_mask_restore()
55 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x28),  in mt_irq_mask_restore()
57 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x2c),  in mt_irq_mask_restore()
59 	 mmio_write_32((BASE_GICD_BASE + GICD_ISENABLER + 0x30),  in mt_irq_mask_restore()
78 			GICD_ISENABLER + 0x4));  in mt_irq_mask_all()
80 			GICD_ISENABLER + 0x8));  in mt_irq_mask_all()
82 			GICD_ISENABLER + 0xc));  in mt_irq_mask_all()
84 			GICD_ISENABLER + 0x10));  in mt_irq_mask_all()
86 			GICD_ISENABLER + 0x14));  in mt_irq_mask_all()
88 			GICD_ISENABLER + 0x18));  in mt_irq_mask_all()
90 			GICD_ISENABLER + 0x1c));  in mt_irq_mask_all()
92 			GICD_ISENABLER + 0x20));  in mt_irq_mask_all()
94 			GICD_ISENABLER + 0x24));  in mt_irq_mask_all()
96 			GICD_ISENABLER + 0x28));  in mt_irq_mask_all()
98 			GICD_ISENABLER + 0x2c));  in mt_irq_mask_all()
100 			GICD_ISENABLER + 0x30));  in mt_irq_mask_all()
303 	addr = BASE_GICD_BASE + GICD_ISENABLER + (irq / 32U) * 4U;  in mt_irq_get_en()
482 	mmio_write_32(BASE_GICD_BASE + GICD_ISENABLER +  in mt_irq_unmask_for_sleep_ex()