124 	int are_idx = ACC_ENTRY_BEGIN;  in apu_acc_init()  local
130 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_0);  in apu_acc_init()
131 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL0, APU_ARDCM_CTRL0_VAL_0);  in apu_acc_init()
132 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_1);  in apu_acc_init()
133 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL0, APU_ARDCM_CTRL0_VAL_1);  in apu_acc_init()
135 		apu_w_are(are_idx++, base_reg + APU_ACC_CONFG_CLR0, CGEN_SOC);  in apu_acc_init()
136 		apu_w_are(are_idx++, base_reg + APU_ACC_CONFG_SET0, HW_CTRL_EN);  in apu_acc_init()
142 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_0);  in apu_acc_init()
143 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL0, APU_ARDCM_CTRL0_VAL_0);  in apu_acc_init()
144 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_1);  in apu_acc_init()
145 		apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL0, APU_ARDCM_CTRL0_VAL_1);  in apu_acc_init()
147 		apu_w_are(are_idx++, base_reg + APU_ACC_CONFG_CLR0, CGEN_SOC);  in apu_acc_init()
148 		apu_w_are(are_idx++, base_reg + APU_ACC_CONFG_SET0, HW_CTRL_EN);  in apu_acc_init()
149 		apu_w_are(are_idx++, base_reg + APU_ACC_AUTO_CTRL_SET0, CLK_REQ_SW_EN);  in apu_acc_init()
163 	int pll_idx, are_idx;  in apu_pll_init()  local
172 	are_idx = PLL_ENTRY_BEGIN;  in apu_pll_init()
176 		apu_w_are(are_idx++, base_reg + RG_PLLGP_LVR_REFSEL, RG_PLLGP_LVR_REFSEL_VAL);  in apu_pll_init()
177 		apu_w_are(are_idx++, base_reg + PLL1CPLL_FHCTL_HP_EN, FHCTL_CTRL);  in apu_pll_init()
178 		apu_w_are(are_idx++, base_reg + PLL1CPLL_FHCTL_RST_CON, FHCTL_NO_RESET);  in apu_pll_init()
179 		apu_w_are(are_idx++, base_reg + PLL1CPLL_FHCTL_CLK_CON, FHCTL_CLKEN);  in apu_pll_init()
180 		apu_w_are(are_idx++, base_reg + PLL1CPLL_FHCTL0_CFG,  in apu_pll_init()
187 		apu_w_are(are_idx++, base_reg + PLL1C_PLL1_CON1,  in apu_pll_init()
191 		apu_w_are(are_idx++, base_reg + PLL1CPLL_FHCTL0_DDS,  in apu_pll_init()