498 static void plat_marvell_power_off_gpio(struct power_off_method *pm_cfg,  in plat_marvell_power_off_gpio()  argument
510 	assert((pm_cfg->cfg.gpio.pin_count < PMIC_GPIO_MAX_NUMBER) &&  in plat_marvell_power_off_gpio()
511 	       (pm_cfg->cfg.gpio.step_count < PMIC_GPIO_MAX_TOGGLE_STEP));  in plat_marvell_power_off_gpio()
514 	for (gpio = 0; gpio < pm_cfg->cfg.gpio.pin_count; gpio++) {  in plat_marvell_power_off_gpio()
515 		info = &pm_cfg->cfg.gpio.info[gpio];  in plat_marvell_power_off_gpio()
532 	mdelay(pm_cfg->cfg.gpio.delay_ms);  in plat_marvell_power_off_gpio()
537 	for (idx = 0; idx < pm_cfg->cfg.gpio.step_count; idx++) {  in plat_marvell_power_off_gpio()
538 		tog_bits = pm_cfg->cfg.gpio.seq[idx];  in plat_marvell_power_off_gpio()
543 		info = &pm_cfg->cfg.gpio.info[0];  in plat_marvell_power_off_gpio()
548 		for (gpio = 0; gpio < pm_cfg->cfg.gpio.pin_count; gpio++) {  in plat_marvell_power_off_gpio()
549 			shift = pm_cfg->cfg.gpio.info[gpio].gpio_index % 32;  in plat_marvell_power_off_gpio()
559 		if (idx < pm_cfg->cfg.gpio.step_count - 1) {  in plat_marvell_power_off_gpio()
562 			mdelay(pm_cfg->cfg.gpio.delay_ms);  in plat_marvell_power_off_gpio()
576 static void plat_marvell_power_off_prepare(struct power_off_method *pm_cfg,  in plat_marvell_power_off_prepare()  argument
579 	switch (pm_cfg->type) {  in plat_marvell_power_off_prepare()
581 		plat_marvell_power_off_gpio(pm_cfg, addr, data);  in plat_marvell_power_off_prepare()
738 	struct power_off_method *pm_cfg;  in a8k_pwr_domain_pwr_down_wfi()  local
748 	pm_cfg = (struct power_off_method *)plat_marvell_get_pm_cfg();  in a8k_pwr_domain_pwr_down_wfi()
751 	plat_marvell_power_off_prepare(pm_cfg, &gpio_addr, &gpio_data);  in a8k_pwr_domain_pwr_down_wfi()