soc/common/socfpga_sip_svc.c

1101 	u_register_t x5, x6, x7, x8, x9, x10, x11;  local
1104 	x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1113 		smc_fid, x1, x2, x3, x4, x5);
1451 			resp_payload_addr = (uint32_t *)x5;
1559 					x5, x6, x7, (uint32_t *) &x8,
1563 					x5, x6, x7, (uint32_t *) &x8,
1734 		status = intel_fcs_aes_crypt_init(x2, x3, x4, x5,
1747 					x3, x4, x5, x6, x7, x8, is_final,
1754 		status = intel_fcs_get_digest_init(x2, x3, x4, x5, x6,
1766 					x3, x4, x5, x6, (uint32_t *) &x7,
1774 		status = intel_fcs_mac_verify_init(x2, x3, x4, x5, x6,
1786 					x3, x4, x5, x6, (uint32_t *) &x7, x8,
1793 		status = intel_fcs_ecdsa_hash_sign_init(x2, x3, x4, x5, x6,
1801 					x4, x5, x6, (uint32_t *) &x7,
1808 		status = intel_fcs_ecdsa_sha2_data_sign_init(x2, x3, x4, x5, x6,
1820 					x1, x2, x3, x4, x5, x6, (uint32_t *) &x7,
1827 		status = intel_fcs_ecdsa_hash_sig_verify_init(x2, x3, x4, x5,
1835 					x2, x3, x4, x5, x6, (uint32_t *) &x7,
1843 					x5, x6, &mbox_error);
1855 					smc_fid, x1, x2, x3, x4, x5, x6,
1863 		status = intel_fcs_ecdsa_get_pubkey_init(x2, x3, x4, x5, x6,
1871 					x4, (uint32_t *) &x5, &mbox_error);
1877 		status = intel_fcs_ecdh_request_init(x2, x3, x4, x5, x6,
1890 					x4, x5, x6, (uint32_t *) &dest_size,
1916 		status = intel_fcs_hkdf_request(smc_fid, x1, x2, x3, x4, x5, x6,
1950 	u_register_t x5, x6, x7;  local
2093 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2095 		status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, x5, x6,
2104 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2107 			status = intel_fcs_decryption(x2, x3, x4, x5, &send_id);
2109 			status = intel_fcs_encryption(x2, x3, x4, x5, &send_id);
2114 		SMC_RET3(handle, status, x4, x5);
2117 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2122 			status = intel_fcs_decryption_ext(smc_fid, 0, x1, x2, x4, x5, x6,
2125 			status = intel_fcs_encryption_ext(smc_fid, 0, x1, x2, x4, x5, x6,
2223 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2225 					x4, x5, &mbox_error);
2229 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2232 					x3, x4, x5, (uint32_t *) &x6, false,
2234 		SMC_RET4(handle, status, mbox_error, x5, x6);
2237 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2240 					x3, x4, x5, (uint32_t *) &x6, true,
2242 		SMC_RET4(handle, status, mbox_error, x5, x6);
2245 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2248 					x4, x5, (uint32_t *) &x6, false,
2250 		SMC_RET4(handle, status, mbox_error, x5, x6);
2253 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2256 					x4, x5, (uint32_t *) &x6, true,
2258 		SMC_RET4(handle, status, mbox_error, x5, x6);
2261 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2263 					x4, x5, &mbox_error);
2267 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2271 					x3, x4, x5, (uint32_t *) &x6, x7, false,
2273 		SMC_RET4(handle, status, mbox_error, x5, x6);
2276 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2280 					x3, x4, x5, (uint32_t *) &x6, x7, true,
2282 		SMC_RET4(handle, status, mbox_error, x5, x6);
2285 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2289 					x4, x5, (uint32_t *) &x6, x7,
2291 		SMC_RET4(handle, status, mbox_error, x5, x6);
2294 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2298 					x4, x5, (uint32_t *) &x6, x7,
2300 		SMC_RET4(handle, status, mbox_error, x5, x6);
2303 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2305 					x4, x5, &mbox_error);
2309 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2312 					0, x1, x2, x3, x4, x5, (uint32_t *) &x6,
2314 		SMC_RET4(handle, status, mbox_error, x5, x6);
2317 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2320 					0, x1, x2, x3, x4, x5, (uint32_t *) &x6,
2322 		SMC_RET4(handle, status, mbox_error, x5, x6);
2325 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2328 					x2, x3, x4, x5, (uint32_t *) &x6, false,
2330 		SMC_RET4(handle, status, mbox_error, x5, x6);
2333 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2336 					x2, x3, x4, x5, (uint32_t *) &x6, true,
2338 		SMC_RET4(handle, status, mbox_error, x5, x6);
2341 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2343 					x4, x5, &mbox_error);
2347 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2350 					x3, x4, x5, (uint32_t *) &x6,
2352 		SMC_RET4(handle, status, mbox_error, x5, x6);
2355 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2357 					x4, x5, &mbox_error);
2361 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2364 					x2, x3, x4, x5, (uint32_t *) &x6,
2366 		SMC_RET4(handle, status, mbox_error, x5, x6);
2369 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2371 					x4, x5, &mbox_error);
2375 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2379 					smc_fid, 0, x1, x2, x3, x4, x5,
2382 		SMC_RET4(handle, status, mbox_error, x5, x6);
2385 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2389 					x1, x2, x3, x4, x5, (uint32_t *) &x6,
2391 		SMC_RET4(handle, status, mbox_error, x5, x6);
2394 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2398 					x1, x2, x3, x4, x5, (uint32_t *) &x6,
2400 		SMC_RET4(handle, status, mbox_error, x5, x6);
2403 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2407 					smc_fid, 0, x1, x2, x3, x4, x5,
2410 		SMC_RET4(handle, status, mbox_error, x5, x6);
2413 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2415 					x4, x5, &mbox_error);
2425 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2427 					x4, x5, &mbox_error);
2431 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2434 					 x4, x5, (uint32_t *) &x6, &mbox_error);
2435 		SMC_RET4(handle, status, mbox_error, x5, x6);
2438 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2439 		status = intel_fcs_aes_crypt_init(x1, x2, x3, x4, x5,
2444 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2447 					x3, x4, x5, x6, 0, false, &send_id, 0, 0);
2451 		x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
2454 					x3, x4, x5, x6, 0, true, &send_id, 0, 0);