soc/common/socfpga_sip_svc.c

697 				uint32_t *ret_size, uint32_t *mbox_error)  argument
735 		*mbox_error = -status;
737 		*mbox_error = -status;
1100 	uint32_t mbox_error = 0U;  local
1523 					x4, &mbox_error);
1544 					(uint32_t *) &x4, &mbox_error);
1551 					x2, &mbox_error);
1560 					&mbox_error, x10, x11);
1564 					&mbox_error, x9, x10, x11);
1574 		status = intel_fcs_send_cert(smc_fid, x1, x2, x3, &mbox_error);
1735 					x6, &mbox_error);
1755 					&mbox_error);
1767 					is_final, &mbox_error, x8);
1775 					&mbox_error);
1787 					is_final, &mbox_error, x9);
1794 					&mbox_error);
1802 					&mbox_error);
1809 					&mbox_error);
1821 					is_final, &mbox_error, x8);
1828 					x6, &mbox_error);
1836 					&mbox_error);
1843 					x5, x6, &mbox_error);
1857 					&mbox_error, x9);
1864 					&mbox_error);
1871 					x4, (uint32_t *) &x5, &mbox_error);
1878 					&mbox_error);
1891 					&mbox_error);
1943 	uint32_t mbox_error = 0;  local
2085 						&len_in_resp, &mbox_error);
2086 		SMC_RET4(handle, status, mbox_error, x1, len_in_resp);
2123 					(uint32_t *) &x7, &mbox_error, 0, 0, 0);
2126 					(uint32_t *) &x7, &mbox_error, 0, 0);
2131 		SMC_RET4(handle, status, mbox_error, x6, x7);
2135 							&mbox_error);
2136 		SMC_RET4(handle, status, mbox_error, x1, retval64);
2153 							&mbox_error);
2154 		SMC_RET2(handle, status, mbox_error);
2169 		status = intel_fcs_sigma_teardown(x1, &mbox_error);
2170 		SMC_RET2(handle, status, mbox_error);
2173 		status = intel_fcs_chip_id(&retval, &retval2, &mbox_error);
2174 		SMC_RET4(handle, status, mbox_error, retval, retval2);
2178 					(uint32_t *) &x4, &mbox_error);
2179 		SMC_RET4(handle, status, mbox_error, x3, x4);
2183 					(uint32_t *) &x4, &mbox_error);
2184 		SMC_RET4(handle, status, mbox_error, x3, x4);
2188 					(uint32_t *) &x3, &mbox_error);
2189 		SMC_RET4(handle, status, mbox_error, x2, x3);
2192 		status = intel_fcs_create_cert_on_reload(smc_fid, 0, x1, &mbox_error);
2193 		SMC_RET2(handle, status, mbox_error);
2196 		status = intel_fcs_open_crypto_service_session(&retval, &mbox_error);
2197 		SMC_RET3(handle, status, mbox_error, retval);
2200 		status = intel_fcs_close_crypto_service_session(x1, &mbox_error);
2201 		SMC_RET2(handle, status, mbox_error);
2209 					(uint32_t *) &x4, &mbox_error);
2210 		SMC_RET4(handle, status, mbox_error, x3, x4);
2214 					&mbox_error);
2215 		SMC_RET2(handle, status, mbox_error);
2219 					(uint32_t *) &x4, &mbox_error);
2220 		SMC_RET4(handle, status, mbox_error, x3, x4);
2225 					x4, x5, &mbox_error);
2226 		SMC_RET2(handle, status, mbox_error);
2233 					&mbox_error, 0);
2234 		SMC_RET4(handle, status, mbox_error, x5, x6);
2241 					&mbox_error, 0);
2242 		SMC_RET4(handle, status, mbox_error, x5, x6);
2249 					&mbox_error, &send_id);
2250 		SMC_RET4(handle, status, mbox_error, x5, x6);
2257 					&mbox_error, &send_id);
2258 		SMC_RET4(handle, status, mbox_error, x5, x6);
2263 					x4, x5, &mbox_error);
2264 		SMC_RET2(handle, status, mbox_error);
2272 					&mbox_error, 0);
2273 		SMC_RET4(handle, status, mbox_error, x5, x6);
2281 					&mbox_error, 0);
2282 		SMC_RET4(handle, status, mbox_error, x5, x6);
2290 					false, &mbox_error, &send_id);
2291 		SMC_RET4(handle, status, mbox_error, x5, x6);
2299 					true, &mbox_error, &send_id);
2300 		SMC_RET4(handle, status, mbox_error, x5, x6);
2305 					x4, x5, &mbox_error);
2306 		SMC_RET2(handle, status, mbox_error);
2313 					false, &mbox_error, 0);
2314 		SMC_RET4(handle, status, mbox_error, x5, x6);
2321 					true, &mbox_error, 0);
2322 		SMC_RET4(handle, status, mbox_error, x5, x6);
2329 					&mbox_error, &send_id);
2330 		SMC_RET4(handle, status, mbox_error, x5, x6);
2337 					&mbox_error, &send_id);
2338 		SMC_RET4(handle, status, mbox_error, x5, x6);
2343 					x4, x5, &mbox_error);
2344 		SMC_RET2(handle, status, mbox_error);
2351 					&mbox_error);
2352 		SMC_RET4(handle, status, mbox_error, x5, x6);
2357 					x4, x5, &mbox_error);
2358 		SMC_RET2(handle, status, mbox_error);
2365 					&mbox_error);
2366 		SMC_RET4(handle, status, mbox_error, x5, x6);
2371 					x4, x5, &mbox_error);
2372 		SMC_RET2(handle, status, mbox_error);
2381 					&mbox_error, 0);
2382 		SMC_RET4(handle, status, mbox_error, x5, x6);
2390 					x7, false, &mbox_error, &send_id);
2391 		SMC_RET4(handle, status, mbox_error, x5, x6);
2399 					x7, true, &mbox_error, &send_id);
2400 		SMC_RET4(handle, status, mbox_error, x5, x6);
2409 					&mbox_error, 0);
2410 		SMC_RET4(handle, status, mbox_error, x5, x6);
2415 					x4, x5, &mbox_error);
2416 		SMC_RET2(handle, status, mbox_error);
2421 				x1, x2, x3, (uint32_t *) &x4, &mbox_error);
2422 		SMC_RET4(handle, status, mbox_error, x3, x4);
2427 					x4, x5, &mbox_error);
2428 		SMC_RET2(handle, status, mbox_error);
2434 					 x4, x5, (uint32_t *) &x6, &mbox_error);
2435 		SMC_RET4(handle, status, mbox_error, x5, x6);
2440 					&mbox_error);
2441 		SMC_RET2(handle, status, mbox_error);
2465 							&mbox_error);
2466 		SMC_RET4(handle, status, mbox_error, x1, retval64);