33 void socfpga_wakeup_secondary_cpu(unsigned int cpu_id);
57 	unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr);  in socfpga_pwr_domain_on()  local
67 	if (cpu_id == -1)  in socfpga_pwr_domain_on()
71 	if (cpu_id == 0x00) {  in socfpga_pwr_domain_on()
77 	mmio_write_64(PLAT_CPUID_RELEASE, cpu_id);  in socfpga_pwr_domain_on()
86 	if ((AGX5_PWRMGR_MPU_TRIGGER_PCH_CPU(1 << cpu_id) & (pch_cpu)) != 0)  in socfpga_pwr_domain_on()
87 		bl31_plat_reset_secondary_cpu(cpu_id);  in socfpga_pwr_domain_on()
89 	bl31_plat_set_secondary_cpu_entrypoint(cpu_id);  in socfpga_pwr_domain_on()
91 	mmio_setbits_32(SOCFPGA_RSTMGR(MPUMODRST), 1 << cpu_id);  in socfpga_pwr_domain_on()
92 	mmio_write_64(PLAT_CPUID_RELEASE, cpu_id);  in socfpga_pwr_domain_on()
124 	unsigned int cpu_id = plat_my_core_pos();  in socfpga_pwr_domain_suspend()  local
133 	mmio_setbits_32(SOCFPGA_RSTMGR(MPUMODRST), 1 << cpu_id);  in socfpga_pwr_domain_suspend()
172 	unsigned int cpu_id = plat_my_core_pos();  in socfpga_pwr_domain_suspend_finish()  local
181 	mmio_clrbits_32(SOCFPGA_RSTMGR(MPUMODRST), 1 << cpu_id);  in socfpga_pwr_domain_suspend_finish()