Lines Matching refs:PLATFORM_MODEL

20 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5
32 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5
58 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_on()
70 #if PLATFORM_MODEL != PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_on()
81 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_on()
123 #if PLATFORM_MODEL != PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_suspend()
131 #if PLATFORM_MODEL != PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_suspend()
171 #if PLATFORM_MODEL != PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_suspend_finish()
179 #if PLATFORM_MODEL != PLAT_SOCFPGA_AGILEX5  in socfpga_pwr_domain_suspend_finish()
211 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5  in socfpga_system_reset()
239 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5  in socfpga_system_reset2()
263 #if PLATFORM_MODEL != PLAT_SOCFPGA_AGILEX5  in socfpga_system_reset2()