common/include/socfpga_fcs.h

115 	uint32_t session_id;
116 	uint32_t context_id;
117 	uint32_t crypto_header;
118 	uint32_t size;
122 	uint32_t first_word;
123 	uint32_t src_addr;
124 	uint32_t src_size;
125 	uint32_t dst_addr;
126 	uint32_t dst_size;
130 	uint32_t first_word;
131 	uint32_t owner_id[2];
132 	uint32_t src_addr;
133 	uint32_t src_size;
134 	uint32_t dst_addr;
135 	uint32_t dst_size;
139 	uint32_t session_id;
140 	uint32_t context_id;
141 	uint32_t crypto_header;
142 	uint32_t src_addr;
143 	uint32_t src_size;
144 	uint32_t dst_addr;
145 	uint32_t dst_size;
149 	uint32_t session_id;
150 	uint32_t context_id;
151 	uint32_t crypto_header;
152 	uint32_t owner_id[2];
153 	uint32_t src_addr;
154 	uint32_t src_size;
155 	uint32_t dst_addr;
156 	uint32_t dst_size;
160 	uint32_t reserved_word;
161 	uint32_t magic_word;
162 	uint32_t session_id;
166 	uint32_t first_word;
167 	uint32_t counter_value;
171 	uint32_t session_id;
172 	uint32_t reserved0;
173 	uint32_t reserved1;
174 	uint32_t key_id;
178 	uint32_t session_id;
179 	uint32_t context_id;
180 	uint32_t key_id;
181 	uint32_t crypto_param_size;
187 	uint32_t session_id;
188 	uint32_t context_id;
189 	uint32_t param_size;
190 	uint32_t key_id;
191 	uint32_t crypto_param[7];
197 uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size,
198 				uint32_t *mbox_error);
199 int intel_fcs_random_number_gen_ext(uint32_t session_id, uint32_t context_id,
200 				uint32_t size, uint32_t *send_id);
201 uint32_t intel_fcs_send_cert(uint32_t smc_fid, uint32_t trans_id,
203 				uint32_t *send_id);
204 uint32_t intel_fcs_get_provision_data(uint32_t *send_id);
205 uint32_t intel_fcs_cntr_set_preauth(uint32_t smc_fid, uint32_t trans_id,
208 				uint32_t test_bit,
209 				uint32_t *mbox_error);
210 uint32_t intel_fcs_encryption(uint32_t src_addr, uint32_t src_size,
211 				uint32_t dst_addr, uint32_t dst_size,
212 				uint32_t *send_id);
214 uint32_t intel_fcs_decryption(uint32_t src_addr, uint32_t src_size,
215 				uint32_t dst_addr, uint32_t dst_size,
216 				uint32_t *send_id);
218 int intel_fcs_encryption_ext(uint32_t smc_fid, uint32_t trans_id,
219 				uint32_t session_id, uint32_t context_id,
220 				uint32_t src_addr, uint32_t src_size,
221 				uint32_t dst_addr, uint32_t *dst_size,
222 				uint32_t *mbox_error, uint32_t smmu_src_addr,
223 				uint32_t smmu_dst_addr);
224 int intel_fcs_decryption_ext(uint32_t smc_fid, uint32_t trans_id,
225 				uint32_t sesion_id, uint32_t context_id,
226 				uint32_t src_addr, uint32_t src_size,
227 				uint32_t dst_addr, uint32_t *dst_size,
228 				uint32_t *mbox_error, uint64_t owner_id,
229 				uint32_t smmu_src_addr, uint32_t smmu_dst_addr);
231 int intel_fcs_sigma_teardown(uint32_t session_id, uint32_t *mbox_error);
232 int intel_fcs_chip_id(uint32_t *id_low, uint32_t *id_high, uint32_t *mbox_error);
233 int intel_fcs_attestation_subkey(uint64_t src_addr, uint32_t src_size,
234 				uint64_t dst_addr, uint32_t *dst_size,
235 				uint32_t *mbox_error);
236 int intel_fcs_get_measurement(uint64_t src_addr, uint32_t src_size,
237 				uint64_t dst_addr, uint32_t *dst_size,
238 				uint32_t *mbox_error);
239 uint32_t intel_fcs_get_rom_patch_sha384(uint64_t addr, uint64_t *ret_size,
240 				uint32_t *mbox_error);
242 int intel_fcs_create_cert_on_reload(uint32_t smc_fid, uint32_t trans_id,
243 				uint32_t cert_request, uint32_t *mbox_error);
244 int intel_fcs_get_attestation_cert(uint32_t smc_fid, uint32_t trans_id,
245 				uint32_t cert_request, uint64_t dst_addr,
246 				uint32_t *dst_size, uint32_t *mbox_error);
248 int intel_fcs_open_crypto_service_session(uint32_t *session_id,
249 				uint32_t *mbox_error);
250 int intel_fcs_close_crypto_service_session(uint32_t session_id,
251 				uint32_t *mbox_error);
253 int intel_fcs_import_crypto_service_key(uint64_t src_addr, uint32_t src_size,
254 				uint32_t *mbox_error);
255 int intel_fcs_export_crypto_service_key(uint32_t session_id, uint32_t key_id,
256 				uint64_t dst_addr, uint32_t *dst_size,
257 				uint32_t *mbox_error);
258 int intel_fcs_remove_crypto_service_key(uint32_t session_id, uint32_t key_id,
259 				uint32_t *mbox_error);
260 int intel_fcs_get_crypto_service_key_info(uint32_t session_id, uint32_t key_id,
261 				uint64_t dst_addr, uint32_t *dst_size,
262 				uint32_t *mbox_error);
264 int intel_fcs_get_digest_init(uint32_t session_id, uint32_t context_id,
265 				uint32_t key_id, uint32_t param_size,
266 				uint64_t param_data, uint32_t *mbox_error);
267 int intel_fcs_get_digest_update_finalize(uint32_t smc_fid, uint32_t trans_id,
268 				uint32_t session_id, uint32_t context_id,
269 				uint32_t src_addr, uint32_t src_size,
270 				uint64_t dst_addr, uint32_t *dst_size,
271 				uint8_t is_finalised, uint32_t *mbox_error,
272 				uint32_t smmu_src_addr);
273 int intel_fcs_get_digest_smmu_update_finalize(uint32_t session_id, uint32_t context_id,
274 				uint32_t src_addr, uint32_t src_size,
275 				uint64_t dst_addr, uint32_t *dst_size,
276 				uint8_t is_finalised, uint32_t *mbox_error,
277 				uint32_t *send_id);
279 int intel_fcs_mac_verify_init(uint32_t session_id, uint32_t context_id,
280 				uint32_t key_id, uint32_t param_size,
281 				uint64_t param_data, uint32_t *mbox_error);
282 int intel_fcs_mac_verify_update_finalize(uint32_t smc_fid, uint32_t trans_id,
283 				uint32_t session_id, uint32_t context_id,
284 				uint32_t src_addr, uint32_t src_size,
285 				uint64_t dst_addr, uint32_t *dst_size,
286 				uint32_t data_size, uint8_t is_finalised,
287 				uint32_t *mbox_error, uint64_t smmu_src_addr);
288 int intel_fcs_mac_verify_smmu_update_finalize(uint32_t session_id, uint32_t context_id,
289 				uint32_t src_addr, uint32_t src_size,
290 				uint64_t dst_addr, uint32_t *dst_size,
291 				uint32_t data_size, uint8_t is_finalised,
292 				uint32_t *mbox_error, uint32_t *send_id);
294 int intel_fcs_ecdsa_hash_sign_init(uint32_t session_id, uint32_t context_id,
295 				uint32_t key_id, uint32_t param_size,
296 				uint64_t param_data, uint32_t *mbox_error);
297 int intel_fcs_ecdsa_hash_sign_finalize(uint32_t smc_fid, uint32_t trans_id,
298 				uint32_t session_id, uint32_t context_id,
299 				uint32_t src_addr, uint32_t src_size,
300 				uint64_t dst_addr, uint32_t *dst_size,
301 				uint32_t *mbox_error);
303 int intel_fcs_ecdsa_hash_sig_verify_init(uint32_t session_id, uint32_t context_id,
304 				uint32_t key_id, uint32_t param_size,
305 				uint64_t param_data, uint32_t *mbox_error);
306 int intel_fcs_ecdsa_hash_sig_verify_finalize(uint32_t smc_fid, uint32_t trans_id,
307 				uint32_t session_id, uint32_t context_id,
308 				uint32_t src_addr, uint32_t src_size,
309 				uint64_t dst_addr, uint32_t *dst_size,
310 				uint32_t *mbox_error);
312 int intel_fcs_ecdsa_sha2_data_sign_init(uint32_t session_id,
313 				uint32_t context_id, uint32_t key_id,
314 				uint32_t param_size, uint64_t param_data,
315 				uint32_t *mbox_error);
316 int intel_fcs_ecdsa_sha2_data_sign_update_finalize(uint32_t smc_fid, uint32_t trans_id,
317 				uint32_t session_id, uint32_t context_id,
318 				uint32_t src_addr, uint32_t src_size,
319 				uint64_t dst_addr, uint32_t *dst_size,
320 				uint8_t is_finalised, uint32_t *mbox_error,
322 int intel_fcs_ecdsa_sha2_data_sign_smmu_update_finalize(uint32_t session_id,
323 				uint32_t context_id, uint32_t src_addr,
324 				uint32_t src_size, uint64_t dst_addr,
325 				uint32_t *dst_size, uint8_t is_finalised,
326 				uint32_t *mbox_error, uint32_t *send_id);
328 int intel_fcs_ecdsa_sha2_data_sig_verify_init(uint32_t session_id,
329 				uint32_t context_id, uint32_t key_id,
330 				uint32_t param_size, uint64_t param_data,
331 				uint32_t *mbox_error);
332 int intel_fcs_ecdsa_sha2_data_sig_verify_update_finalize(uint32_t smc_fid, uint32_t trans_id,
333 				uint32_t session_id, uint32_t context_id,
334 				uint32_t src_addr, uint32_t src_size,
335 				uint64_t dst_addr, uint32_t *dst_size,
336 				uint32_t data_size, uint8_t is_finalised,
337 				uint32_t *mbox_error, uint64_t smmu_src_addr);
338 int intel_fcs_ecdsa_sha2_data_sig_verify_smmu_update_finalize(uint32_t session_id,
339 				uint32_t context_id, uint32_t src_addr,
340 				uint32_t src_size, uint64_t dst_addr,
341 				uint32_t *dst_size, uint32_t data_size,
342 				uint8_t is_finalised, uint32_t *mbox_error,
343 				uint32_t *send_id);
345 int intel_fcs_ecdsa_get_pubkey_init(uint32_t session_id, uint32_t context_id,
346 				uint32_t key_id, uint32_t param_size,
347 				uint64_t param_data, uint32_t *mbox_error);
348 int intel_fcs_ecdsa_get_pubkey_finalize(uint32_t smc_fid, uint32_t trans_id,
349 				uint32_t session_id, uint32_t context_id,
350 				uint64_t dst_addr, uint32_t *dst_size,
351 				uint32_t *mbox_error);
353 int intel_fcs_ecdh_request_init(uint32_t session_id, uint32_t context_id,
354 				uint32_t key_id, uint32_t param_size,
355 				uint64_t param_data, uint32_t *mbox_error);
356 int intel_fcs_ecdh_request_finalize(uint32_t smc_fid, uint32_t trans_id,
357 				uint32_t session_id, uint32_t context_id,
358 				uint32_t src_addr, uint32_t src_size,
359 				uint64_t dst_addr, uint32_t *dst_size,
360 				uint32_t *mbox_error);
362 int intel_fcs_aes_crypt_init(uint32_t session_id, uint32_t context_id,
363 				uint32_t key_id, uint64_t param_addr,
364 				uint32_t param_size, uint32_t *mbox_error);
365 int intel_fcs_aes_crypt_update_finalize(uint32_t smc_fid, uint32_t trans_id,
366 				uint32_t session_id, uint32_t context_id,
367 				uint64_t src_addr, uint32_t src_size,
368 				uint64_t dst_addr, uint32_t dst_size,
369 				uint32_t padding_size, uint8_t is_finalised,
370 				uint32_t *send_id, uint64_t smmu_src_addr,
373 int intel_fcs_hkdf_request(uint32_t smc_fid, uint32_t trans_id,
374 			uint32_t session_id, uint32_t step_type,
375 			uint32_t mac_mode, uint32_t src_addr,
376 			uint32_t key_uid, uint32_t op_key_size);