62 void imx_set_cpu_boot_entry(unsigned int core_id, uint64_t boot_entry)  in imx_set_cpu_boot_entry()  argument
65 	mmio_write_32(BLK_CTRL_S_BASE + CA55_RVBADDR0_L + core_id * 8, boot_entry >> 2);  in imx_set_cpu_boot_entry()
70 	unsigned int core_id;  in imx_pwr_domain_on()  local
72 	core_id = MPIDR_AFFLVL1_VAL(mpidr);  in imx_pwr_domain_on()
74 	imx_set_cpu_boot_entry(core_id, secure_entrypoint);  in imx_pwr_domain_on()
83 		mmio_clrbits_32(SRC_SLICE(SRC_A55C0 + core_id) + 0x24, BIT(2) | BIT(0));  in imx_pwr_domain_on()
85 		mmio_setbits_32(SRC_SLICE(SRC_A55C0 + core_id) + 0x24, BIT(2) | BIT(0));  in imx_pwr_domain_on()
87 		mmio_clrbits_32(BLK_CTRL_S_BASE + CA55_CPUWAIT, BIT(core_id));  in imx_pwr_domain_on()
90 		gpc_assert_sw_wakeup(CPU_A55C0 + core_id);  in imx_pwr_domain_on()
99 	unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr);  in imx_pwr_domain_on_finish()  local
106 	gpc_set_cpu_mode(CPU_A55C0 + core_id, CM_MODE_RUN);  in imx_pwr_domain_on_finish()
108 	gpc_deassert_sw_wakeup(CPU_A55C0 + core_id);  in imx_pwr_domain_on_finish()
110 	gpc_select_wakeup_gic(CPU_A55C0 + core_id);  in imx_pwr_domain_on_finish()
115 		src_mem_lpm_en(SRC_A55P0_MEM + core_id, MEM_OFF);  in imx_pwr_domain_on_finish()
117 		src_mix_set_lpm(SRC_A55C0 + core_id, core_id, CM_MODE_WAIT);  in imx_pwr_domain_on_finish()
119 		src_authen_config(SRC_A55C0 + core_id, 1 << core_id, 0x1);  in imx_pwr_domain_on_finish()
128 	unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr);  in imx_pwr_domain_off()  local
139 		gpc_set_irq_mask(CPU_A55C0 + core_id, i, 0xffffffff);  in imx_pwr_domain_off()
142 	gpc_select_wakeup_raw_irq(CPU_A55C0 + core_id);  in imx_pwr_domain_off()
144 	gpc_set_cpu_mode(CPU_A55C0 + core_id, CM_MODE_SUSPEND);  in imx_pwr_domain_off()
150 	unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr);  in imx_pwr_domain_suspend()  local
155 		imx_set_cpu_boot_entry(core_id, secure_entrypoint);  in imx_pwr_domain_suspend()
157 		gpc_set_cpu_mode(CPU_A55C0 + core_id, CM_MODE_WAIT);  in imx_pwr_domain_suspend()
175 	unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr);  in imx_pwr_domain_suspend_finish()  local
186 		gpc_set_cpu_mode(CPU_A55C0 + core_id, CM_MODE_RUN);  in imx_pwr_domain_suspend_finish()