Lines Matching refs:txmsg
682 upwr_start_msg txmsg = {0}; in upwr_start() local
690 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_START); in upwr_start()
692 txmsg.hdr.arg = fw_launch_option = launchopt; in upwr_start()
694 if (upwr_tx((uint32_t *)&txmsg, sizeof(txmsg) / 4U, NULL) < 0) { in upwr_start()
740 upwr_xcp_config_msg txmsg = {0}; in upwr_xcp_config() local
753 txmsg.hdr.arg = 1U; /* 1= read, txmsg.word2 ignored */ in upwr_xcp_config()
755 txmsg.hdr.arg = 0U; /* 1= write */ in upwr_xcp_config()
756 txmsg.word2 = config->R; in upwr_xcp_config()
759 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_CONFIG); in upwr_xcp_config()
761 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_config()
799 upwr_xcp_swalarm_msg txmsg = {0}; in upwr_xcp_sw_alarm() local
811 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SW_ALARM); in upwr_xcp_sw_alarm()
812 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_sw_alarm()
813 txmsg.hdr.arg = (uint32_t)code; in upwr_xcp_sw_alarm()
815 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_sw_alarm()
840 upwr_xcp_ddr_retn_msg txmsg = {0}; in upwr_xcp_set_ddr_retention() local
852 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SET_DDR_RETN); in upwr_xcp_set_ddr_retention()
853 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_set_ddr_retention()
854 txmsg.hdr.arg = (uint32_t)enable; in upwr_xcp_set_ddr_retention()
856 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_set_ddr_retention()
881 upwr_xcp_set_mipi_dsi_ena_msg txmsg = {0}; in upwr_xcp_set_mipi_dsi_ena() local
893 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SET_MIPI_DSI_ENA); in upwr_xcp_set_mipi_dsi_ena()
894 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_set_mipi_dsi_ena()
895 txmsg.hdr.arg = (uint32_t)enable; in upwr_xcp_set_mipi_dsi_ena()
897 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_set_mipi_dsi_ena()
919 upwr_xcp_get_mipi_dsi_ena_msg txmsg = {0}; in upwr_xcp_get_mipi_dsi_ena() local
931 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_GET_MIPI_DSI_ENA); in upwr_xcp_get_mipi_dsi_ena()
932 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_get_mipi_dsi_ena()
934 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_get_mipi_dsi_ena()
959 upwr_xcp_set_osc_mode_msg txmsg = {0}; in upwr_xcp_set_osc_mode() local
971 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SET_OSC_MODE); in upwr_xcp_set_osc_mode()
972 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_set_osc_mode()
973 txmsg.hdr.arg = (uint32_t)osc_mode; in upwr_xcp_set_osc_mode()
975 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_set_osc_mode()
1001 upwr_xcp_rtd_use_ddr_msg txmsg = {0}; in upwr_xcp_set_rtd_use_ddr() local
1013 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SET_RTD_USE_DDR); in upwr_xcp_set_rtd_use_ddr()
1014 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_set_rtd_use_ddr()
1015 txmsg.hdr.arg = (uint32_t)is_use_ddr; in upwr_xcp_set_rtd_use_ddr()
1017 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_set_rtd_use_ddr()
1042 upwr_xcp_rtd_apd_llwu_msg txmsg = {0}; in upwr_xcp_set_rtd_apd_llwu() local
1054 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SET_RTD_APD_LLWU); in upwr_xcp_set_rtd_apd_llwu()
1055 txmsg.hdr.domain = (uint32_t)domain; in upwr_xcp_set_rtd_apd_llwu()
1056 txmsg.hdr.arg = (uint32_t)enable; in upwr_xcp_set_rtd_apd_llwu()
1058 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_set_rtd_apd_llwu()
1086 upwr_xcp_shutdown_msg txmsg = {0}; in upwr_xcp_shutdown() local
1098 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SHUTDOWN); in upwr_xcp_shutdown()
1100 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_shutdown()
1153 upwr_pwm_pmiccfg_msg txmsg = {0}; in upwr_xcp_i2c_access() local
1165 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_I2C); in upwr_xcp_i2c_access()
1173 txmsg.ptr = upwr_ptr2offset(ptrval, in upwr_xcp_i2c_access()
1179 upwr_srv_req(UPWR_SG_EXCEPT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_xcp_i2c_access()
1215 upwr_volt_pmic_cold_reset_msg txmsg = {0}; in upwr_vtm_pmic_cold_reset() local
1227 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_PMIC_COLD_RESET); in upwr_vtm_pmic_cold_reset()
1229 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_pmic_cold_reset()
1261 upwr_volt_pmic_set_mode_msg txmsg = {0}; in upwr_vtm_set_pmic_mode() local
1273 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_SET_PMIC_MODE); in upwr_vtm_set_pmic_mode()
1275 txmsg.hdr.arg = pmic_mode; in upwr_vtm_set_pmic_mode()
1277 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_set_pmic_mode()
1311 upwr_volt_pmic_set_volt_msg txmsg = {0}; in upwr_vtm_chng_pmic_voltage() local
1323 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_CHNG_PMIC_RAIL_VOLT); in upwr_vtm_chng_pmic_voltage()
1325 txmsg.args.rail = rail; in upwr_vtm_chng_pmic_voltage()
1327 txmsg.args.volt = (volt + PMIC_VOLTAGE_MIN_STEP - 1U) / PMIC_VOLTAGE_MIN_STEP; in upwr_vtm_chng_pmic_voltage()
1329 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_chng_pmic_voltage()
1367 upwr_volt_pmic_get_volt_msg txmsg = {0}; in upwr_vtm_get_pmic_voltage() local
1379 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_GET_PMIC_RAIL_VOLT); in upwr_vtm_get_pmic_voltage()
1381 txmsg.args.rail = rail; in upwr_vtm_get_pmic_voltage()
1383 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_get_pmic_voltage()
1437 upwr_volt_pmeter_meas_msg txmsg = {0}; in upwr_vtm_power_measure() local
1449 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_PMETER_MEAS); in upwr_vtm_power_measure()
1451 txmsg.hdr.arg = ssel; in upwr_vtm_power_measure()
1453 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_power_measure()
1505 upwr_volt_vmeter_meas_msg txmsg = {0}; in upwr_vtm_vmeter_measure() local
1517 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_VMETER_MEAS); in upwr_vtm_vmeter_measure()
1519 txmsg.hdr.arg = vdetsel; in upwr_vtm_vmeter_measure()
1521 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_vmeter_measure()
1552 upwr_pwm_pmiccfg_msg txmsg = {0}; in upwr_vtm_pmic_config() local
1565 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_VOLTM, UPWR_VTM_PMIC_CONFIG); in upwr_vtm_pmic_config()
1572 txmsg.ptr = upwr_ptr2offset(ptrval, in upwr_vtm_pmic_config()
1578 upwr_srv_req(UPWR_SG_VOLTM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_vtm_pmic_config()
1626 upwr_temp_get_cur_temp_msg txmsg = {0}; in upwr_tpm_get_temperature() local
1638 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_TEMPM, UPWR_TEMP_GET_CUR_TEMP); in upwr_tpm_get_temperature()
1640 txmsg.args.sensor_id = sensor_id; in upwr_tpm_get_temperature()
1642 upwr_srv_req(UPWR_SG_TEMPM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_tpm_get_temperature()
1686 upwr_dmeter_get_delay_margin_msg txmsg = {0}; in upwr_dlm_get_delay_margin() local
1698 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_DELAYM, UPWR_DMETER_GET_DELAY_MARGIN); in upwr_dlm_get_delay_margin()
1700 txmsg.args.path = path; in upwr_dlm_get_delay_margin()
1701 txmsg.args.index = index; in upwr_dlm_get_delay_margin()
1703 upwr_srv_req(UPWR_SG_DELAYM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_dlm_get_delay_margin()
1745 upwr_dmeter_set_delay_margin_msg txmsg = {0}; in upwr_dlm_set_delay_margin() local
1757 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_DELAYM, UPWR_DMETER_SET_DELAY_MARGIN); in upwr_dlm_set_delay_margin()
1759 txmsg.args.path = path; in upwr_dlm_set_delay_margin()
1760 txmsg.args.index = index; in upwr_dlm_set_delay_margin()
1761 txmsg.args.dm = delay_margin; in upwr_dlm_set_delay_margin()
1763 upwr_srv_req(UPWR_SG_DELAYM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_dlm_set_delay_margin()
1806 upwr_pmon_msg txmsg = {0}; in upwr_dlm_process_monitor() local
1818 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_DELAYM, UPWR_PMON_REQ); in upwr_dlm_process_monitor()
1820 txmsg.args.chain_sel = chain_sel; in upwr_dlm_process_monitor()
1822 upwr_srv_req(UPWR_SG_DELAYM, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_dlm_process_monitor()
1859 upwr_pwm_dom_pwron_msg txmsg = {0}; in upwr_pwm_dom_power_on() local
1875 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_DOM_PWRON); in upwr_pwm_dom_power_on()
1876 txmsg.hdr.domain = (uint32_t)domain; in upwr_pwm_dom_power_on()
1877 txmsg.hdr.arg = (uint32_t)boot_start; in upwr_pwm_dom_power_on()
1879 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_dom_power_on()
1912 upwr_pwm_boot_start_msg txmsg = {0}; in upwr_pwm_boot_start() local
1928 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_BOOT); in upwr_pwm_boot_start()
1929 txmsg.hdr.domain = (uint32_t)domain; in upwr_pwm_boot_start()
1931 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_boot_start()
1967 upwr_pwm_param_msg txmsg = {0}; in upwr_pwm_param() local
1979 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_PARAM); in upwr_pwm_param()
1982 txmsg.hdr.arg = 1U; /* 1= read, txmsg.word2 ignored */ in upwr_pwm_param()
1984 txmsg.hdr.arg = 0U; /* 1= write */ in upwr_pwm_param()
1985 txmsg.word2 = param->R; /* just 1 word, so that's ok */ in upwr_pwm_param()
1988 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_param()
2023 upwr_pwm_volt_msg txmsg = {0}; in upwr_pwm_chng_reg_voltage() local
2035 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_VOLT); in upwr_pwm_chng_reg_voltage()
2037 txmsg.args.reg = reg; in upwr_pwm_chng_reg_voltage()
2038 txmsg.args.volt = volt; in upwr_pwm_chng_reg_voltage()
2040 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_chng_reg_voltage()
2111 upwr_pwm_freq_msg txmsg = {0}; in upwr_pwm_freq_setup() local
2123 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_FREQ); in upwr_pwm_freq_setup()
2125 txmsg.hdr.domain = (uint32_t)domain; in upwr_pwm_freq_setup()
2126 txmsg.args.rail = rail; in upwr_pwm_freq_setup()
2127 txmsg.args.stage = stage; in upwr_pwm_freq_setup()
2128 txmsg.args.target_freq = target_freq; in upwr_pwm_freq_setup()
2130 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_freq_setup()
2187 upwr_pwm_pwron_msg txmsg = {0}; in upwr_pwm_power_on() local
2201 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_PWR_ON); in upwr_pwm_power_on()
2205 txmsg.ptrs.ptr0 = 0; /* NULL pointer -> 0 offset */ in upwr_pwm_power_on()
2209 txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval, in upwr_pwm_power_on()
2218 txmsg.ptrs.ptr1 = 0; /* NULL pointer -> 0 offset */ in upwr_pwm_power_on()
2223 txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval, in upwr_pwm_power_on()
2230 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_power_on()
2282 upwr_pwm_pwroff_msg txmsg = {0}; in upwr_pwm_power_off() local
2296 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_PWR_OFF); in upwr_pwm_power_off()
2300 txmsg.ptrs.ptr0 = 0; /* NULL pointer -> 0 offset */ in upwr_pwm_power_off()
2304 txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval, in upwr_pwm_power_off()
2313 txmsg.ptrs.ptr1 = 0; /* NULL pointer -> 0 offset */ in upwr_pwm_power_off()
2317 txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval, in upwr_pwm_power_off()
2324 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_power_off()
2365 upwr_pwm_retain_msg txmsg = {0}; in upwr_pwm_mem_retain() local
2378 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_RETAIN); in upwr_pwm_mem_retain()
2385 txmsg.ptr = upwr_ptr2offset(ptrval, in upwr_pwm_mem_retain()
2391 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_mem_retain()
2458 upwr_pwm_switch_msg txmsg = {0}; in upwr_pwm_chng_switch_mem() local
2472 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_SWITCH); in upwr_pwm_chng_switch_mem()
2476 txmsg.ptrs.ptr0 = 0; /* NULL pointer -> 0 offset */ in upwr_pwm_chng_switch_mem()
2480 txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval, in upwr_pwm_chng_switch_mem()
2489 txmsg.ptrs.ptr1 = 0; /* NULL pointer -> 0 offset */ in upwr_pwm_chng_switch_mem()
2493 txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval, in upwr_pwm_chng_switch_mem()
2500 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_chng_switch_mem()
2540 upwr_pwm_pmode_cfg_msg txmsg = {0}; in upwr_pwm_pmode_config() local
2553 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_CONFIG); in upwr_pwm_pmode_config()
2554 txmsg.hdr.domain = (uint32_t)domain; in upwr_pwm_pmode_config()
2555 txmsg.hdr.arg = pmode; in upwr_pwm_pmode_config()
2567 txmsg.ptr = (uint32_t)ptrval; in upwr_pwm_pmode_config()
2569 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_pmode_config()
2609 upwr_pwm_regcfg_msg txmsg = {0}; in upwr_pwm_reg_config() local
2622 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_REGCFG); in upwr_pwm_reg_config()
2629 txmsg.ptr = upwr_ptr2offset(ptrval, in upwr_pwm_reg_config()
2635 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_reg_config()
2668 upwr_pwm_dom_bias_msg txmsg = {0}; in upwr_pwm_chng_dom_bias() local
2680 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_DOM_BIAS); in upwr_pwm_chng_dom_bias()
2683 UPWR_FILL_DOMBIAS_ARGS(txmsg.hdr.domain, bias, txmsg.args); in upwr_pwm_chng_dom_bias()
2685 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_chng_dom_bias()
2721 upwr_pwm_mem_bias_msg txmsg = {0}; in upwr_pwm_chng_mem_bias() local
2733 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_MEM_BIAS); in upwr_pwm_chng_mem_bias()
2735 txmsg.hdr.domain = (uint32_t)domain; in upwr_pwm_chng_mem_bias()
2738 UPWR_FILL_MEMBIAS_ARGS(bias, txmsg.args); in upwr_pwm_chng_mem_bias()
2740 upwr_srv_req(UPWR_SG_PWRMGMT, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_pwm_chng_mem_bias()
2773 upwr_dgn_mode_msg txmsg = {0}; in upwr_dgn_mode() local
2781 UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_DIAG, UPWR_DGN_MODE); in upwr_dgn_mode()
2783 txmsg.hdr.arg = mode; in upwr_dgn_mode()
2785 upwr_srv_req(UPWR_SG_DIAG, (uint32_t *)&txmsg, sizeof(txmsg) / 4U); in upwr_dgn_mode()