45 static void *sh_buffer[UPWR_SG_COUNT];  variable
140 	(void)memcpy((void *)(offset + (char *)sh_buffer[sg]), (void *)vptr, siz);  in upwr_ptr2offset()
141 	return (uint32_t)((unsigned long)sh_buffer[sg] + offset - UPWR_DRAM_SHARED_BASE_ADDR);  in upwr_ptr2offset()
534 	sh_buffer[UPWR_SG_EXCEPT] = (void *)(unsigned long)dom_buffer_base;  in upwr_init()
535 	sh_buffer[UPWR_SG_PWRMGMT] = (void *)(unsigned long)(dom_buffer_base +  in upwr_init()
537 	sh_buffer[UPWR_SG_DELAYM] = NULL;  in upwr_init()
538 	sh_buffer[UPWR_SG_VOLTM] = (void *)(unsigned long)(dom_buffer_base +  in upwr_init()
540 	sh_buffer[UPWR_SG_CURRM] = NULL;  in upwr_init()
541 	sh_buffer[UPWR_SG_TEMPM] = NULL;  in upwr_init()
542 	sh_buffer[UPWR_SG_DIAG] = NULL;  in upwr_init()
1151 	unsigned long ptrval = (unsigned long)sh_buffer[UPWR_SG_EXCEPT];  in upwr_xcp_i2c_access()