1151 	unsigned long ptrval = (unsigned long)sh_buffer[UPWR_SG_EXCEPT];  in upwr_xcp_i2c_access()  local
1152 	upwr_i2c_access *i2c_acc_ptr = (upwr_i2c_access *)ptrval;  in upwr_xcp_i2c_access()
1173 	txmsg.ptr = upwr_ptr2offset(ptrval,  in upwr_xcp_i2c_access()
1553 	unsigned long ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_vtm_pmic_config()  local
1567 	ptrval = (unsigned long)os_ptr2phy(config);  in upwr_vtm_pmic_config()
1568 	if (ptrval == 0UL) {  in upwr_vtm_pmic_config()
1572 	txmsg.ptr = upwr_ptr2offset(ptrval,  in upwr_vtm_pmic_config()
2188 	unsigned long  ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_pwm_power_on()  local
2203 	ptrval = (unsigned long)os_ptr2phy((void *)swton);  in upwr_pwm_power_on()
2206 	} else if (ptrval == 0U) {  in upwr_pwm_power_on()
2209 		txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval,  in upwr_pwm_power_on()
2216 	ptrval = (unsigned long)os_ptr2phy((void *)memon);  in upwr_pwm_power_on()
2220 	} else if (ptrval == 0U) {  in upwr_pwm_power_on()
2223 		txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval,  in upwr_pwm_power_on()
2283 	unsigned long ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_pwm_power_off()  local
2298 	ptrval = (unsigned long)os_ptr2phy((void *)swtoff);  in upwr_pwm_power_off()
2301 	} else if (ptrval == 0U) {  in upwr_pwm_power_off()
2304 		txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval,  in upwr_pwm_power_off()
2311 	ptrval = (unsigned long)os_ptr2phy((void *)memoff);  in upwr_pwm_power_off()
2314 	} else if (ptrval == 0U) {  in upwr_pwm_power_off()
2317 		txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval,  in upwr_pwm_power_off()
2366 	unsigned long ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_pwm_mem_retain()  local
2380 	ptrval = (unsigned long)os_ptr2phy((void *)mem);  in upwr_pwm_mem_retain()
2381 	if (ptrval == 0U) {  in upwr_pwm_mem_retain()
2385 	txmsg.ptr = upwr_ptr2offset(ptrval,  in upwr_pwm_mem_retain()
2459 	unsigned long ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_pwm_chng_switch_mem()  local
2474 	ptrval = (unsigned long)os_ptr2phy((void *)swt);  in upwr_pwm_chng_switch_mem()
2477 	} else if (ptrval == 0U) {  in upwr_pwm_chng_switch_mem()
2480 		txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval,  in upwr_pwm_chng_switch_mem()
2487 	ptrval = (unsigned long)os_ptr2phy((void *)mem);  in upwr_pwm_chng_switch_mem()
2490 	} else if (ptrval == 0U) {  in upwr_pwm_chng_switch_mem()
2493 		txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval,  in upwr_pwm_chng_switch_mem()
2541 	unsigned long ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_pwm_pmode_config()  local
2557 	ptrval = (unsigned long)os_ptr2phy(config);  in upwr_pwm_pmode_config()
2558 	if (ptrval == 0U) {  in upwr_pwm_pmode_config()
2567 	txmsg.ptr = (uint32_t)ptrval;  in upwr_pwm_pmode_config()
2610 	unsigned long ptrval = 0UL; /* needed for X86, ARM64 */  in upwr_pwm_reg_config()  local
2624 	ptrval = (unsigned long)os_ptr2phy(config);  in upwr_pwm_reg_config()
2625 	if (ptrval == 0U) {  in upwr_pwm_reg_config()
2629 	txmsg.ptr = upwr_ptr2offset(ptrval,  in upwr_pwm_reg_config()