100 #define	UPWR_API_READY               (4U) /* ready to receive service requests */  macro
398 			api_state = UPWR_API_READY;  in upwr_start_callb()
438 	case UPWR_API_READY:  in upwr_start_callb()
742 	if (api_state != UPWR_API_READY) {  in upwr_xcp_config()
801 	if (api_state != UPWR_API_READY) {  in upwr_xcp_sw_alarm()
842 	if (api_state != UPWR_API_READY) {  in upwr_xcp_set_ddr_retention()
883 	if (api_state != UPWR_API_READY) {  in upwr_xcp_set_mipi_dsi_ena()
921 	if (api_state != UPWR_API_READY) {  in upwr_xcp_get_mipi_dsi_ena()
961 	if (api_state != UPWR_API_READY) {  in upwr_xcp_set_osc_mode()
1003 	if (api_state != UPWR_API_READY) {  in upwr_xcp_set_rtd_use_ddr()
1044 	if (api_state != UPWR_API_READY) {  in upwr_xcp_set_rtd_apd_llwu()
1088 	if (api_state != UPWR_API_READY) {  in upwr_xcp_shutdown()
1155 	if (api_state != UPWR_API_READY) {  in upwr_xcp_i2c_access()
1217 	if (api_state != UPWR_API_READY) {  in upwr_vtm_pmic_cold_reset()
1263 	if (api_state != UPWR_API_READY) {  in upwr_vtm_set_pmic_mode()
1313 	if (api_state != UPWR_API_READY) {  in upwr_vtm_chng_pmic_voltage()
1369 	if (api_state != UPWR_API_READY) {  in upwr_vtm_get_pmic_voltage()
1439 	if (api_state != UPWR_API_READY) {  in upwr_vtm_power_measure()
1507 	if (api_state != UPWR_API_READY) {  in upwr_vtm_vmeter_measure()
1555 	if (api_state != UPWR_API_READY) {  in upwr_vtm_pmic_config()
1628 	if (api_state != UPWR_API_READY) {  in upwr_tpm_get_temperature()
1688 	if (api_state != UPWR_API_READY) {  in upwr_dlm_get_delay_margin()
1747 	if (api_state != UPWR_API_READY) {  in upwr_dlm_set_delay_margin()
1808 	if (api_state != UPWR_API_READY) {  in upwr_dlm_process_monitor()
1865 	if (api_state != UPWR_API_READY) {  in upwr_pwm_dom_power_on()
1918 	if (api_state != UPWR_API_READY) {  in upwr_pwm_boot_start()
1969 	if (api_state != UPWR_API_READY) {  in upwr_pwm_param()
2025 	if (api_state != UPWR_API_READY) {  in upwr_pwm_chng_reg_voltage()
2113 	if (api_state != UPWR_API_READY) {  in upwr_pwm_freq_setup()
2191 	if (api_state != UPWR_API_READY) {  in upwr_pwm_power_on()
2286 	if (api_state != UPWR_API_READY) {  in upwr_pwm_power_off()
2368 	if (api_state != UPWR_API_READY) {  in upwr_pwm_mem_retain()
2462 	if (api_state != UPWR_API_READY) {  in upwr_pwm_chng_switch_mem()
2543 	if (api_state != UPWR_API_READY) {  in upwr_pwm_pmode_config()
2612 	if (api_state != UPWR_API_READY) {  in upwr_pwm_reg_config()
2670 	if (api_state != UPWR_API_READY) {  in upwr_pwm_chng_dom_bias()
2723 	if (api_state != UPWR_API_READY) {  in upwr_pwm_chng_mem_bias()