Lines Matching refs:IMX_CMC1_BASE

39 #define AD_COREx_LPMODE(c)	(IMX_CMC1_BASE + 0x50 + 0x4 * (c))
107 	mmio_write_32(IMX_CMC1_BASE + 0x18, 0x3f);  in imx_pwr_domain_on()
108 	mmio_write_32(IMX_CMC1_BASE + 0x50 + 0x4 * cpu, 0);  in imx_pwr_domain_on()
310 		mmio_write_32(IMX_CMC1_BASE + 0x50 + 0x4 * cpu, 0x3);  in imx_domain_suspend()
315 		mmio_write_32(IMX_CMC1_BASE + 0x50 + 0x4 * cpu, 0x1);  in imx_domain_suspend()
327 		mmio_write_32(IMX_CMC1_BASE + 0x10, 0x1);  in imx_domain_suspend()
328 		mmio_write_32(IMX_CMC1_BASE + 0x20, 0x1);  in imx_domain_suspend()
335 		mmio_write_32(IMX_CMC1_BASE + 0x10, 0x7);  in imx_domain_suspend()
336 		mmio_write_32(IMX_CMC1_BASE + 0x20, 0xf);  in imx_domain_suspend()
417 	mmio_write_32(IMX_CMC1_BASE + 0x20, 0x0);  in imx_domain_suspend_finish()
418 	mmio_write_32(IMX_CMC1_BASE + 0x10, 0x0);  in imx_domain_suspend_finish()
421 	mmio_write_32(IMX_CMC1_BASE + 0x50 + 0x4 * cpu, 0x0);  in imx_domain_suspend_finish()
512 	mmio_write_32(IMX_CMC1_BASE + 0x10, 0x7);  in imx_system_off()
513 	mmio_write_32(IMX_CMC1_BASE + 0x20, 0x1f);  in imx_system_off()
553 	mmio_write_32(IMX_CMC1_BASE + 0x18, 0x3f);  in plat_setup_psci_ops()