128 	unsigned int i;  in imx_noc_qos()  local
158 	for (i = 0; i < ARRAY_SIZE(noc_setting); i++) {  in imx_noc_qos()
159 		if (noc_setting[i].domain_id == domain_id) {  in imx_noc_qos()
161 			uint32_t offset = noc_setting[i].start;  in imx_noc_qos()
163 			while (offset <= noc_setting[i].end) {  in imx_noc_qos()
164 				mmio_write_32(IMX_NOC_BASE + offset + 0x8, noc_setting[i].prioriy);  in imx_noc_qos()
165 				mmio_write_32(IMX_NOC_BASE + offset + 0xc, noc_setting[i].mode);  in imx_noc_qos()
166 				mmio_write_32(IMX_NOC_BASE + offset + 0x18, noc_setting[i].socket_qos_en);  in imx_noc_qos()
176 	unsigned int i;  in imx_gpc_pm_domain_enable()  local
184 		for (i = 0; i < ARRAY_SIZE(hsiomix_clk); i++) {  in imx_gpc_pm_domain_enable()
185 			hsiomix_clk[i].val = mmio_read_32(IMX_CCM_BASE + hsiomix_clk[i].offset);  in imx_gpc_pm_domain_enable()
186 			mmio_setbits_32(IMX_CCM_BASE + hsiomix_clk[i].offset,  in imx_gpc_pm_domain_enable()
187 					hsiomix_clk[i].type == CCM_ROOT_SLICE ? BIT(28) : 0x3);  in imx_gpc_pm_domain_enable()
286 		for (i = 0; i < ARRAY_SIZE(hsiomix_clk); i++) {  in imx_gpc_pm_domain_enable()
287 			mmio_write_32(IMX_CCM_BASE + hsiomix_clk[i].offset, hsiomix_clk[i].val);  in imx_gpc_pm_domain_enable()
295 	unsigned int i;  in imx_gpc_init()  local
298 	for (i = 0; i < IMR_NUM; i++) {  in imx_gpc_init()
299 		mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_A53 + i * 4, ~0x0);  in imx_gpc_init()
300 		mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0);  in imx_gpc_init()
301 		mmio_write_32(IMX_GPC_BASE + IMR1_CORE2_A53 + i * 4, ~0x0);  in imx_gpc_init()
302 		mmio_write_32(IMX_GPC_BASE + IMR1_CORE3_A53 + i * 4, ~0x0);  in imx_gpc_init()
303 		mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_M4 + i * 4, ~0x0);  in imx_gpc_init()
361 	for (i = 0; i < 101; i++) {  in imx_gpc_init()
362 		mmio_write_32(IMX_CCM_BASE + CCGR(i), 0x3);  in imx_gpc_init()