Lines Matching refs:mmio_read_32
18 while (mmio_read_32(DDRC_MRSTAT(0)) & 0x1) in lpddr4_mr_write()
61 phy_master = mmio_read_32(DDRC_DFIPHYMSTR(0)); in lpddr4_swffc()
76 val = mmio_read_32(DDRC_MRSTAT(0)); in lpddr4_swffc()
84 val = mmio_read_32(DDRC_PSTAT(0)); in lpddr4_swffc()
93 val = mmio_read_32(DDRC_DFILPCFG0(0)); in lpddr4_swffc()
97 val = mmio_read_32(DDRC_DFISTAT(0)); // dfi_lp_ack in lpddr4_swffc()
98 val2 = mmio_read_32(DDRC_STAT(0)); // operating_mode in lpddr4_swffc()
105 val = mmio_read_32(DDRC_STAT(0)); in lpddr4_swffc()
109 val = mmio_read_32(DDRC_DERATEEN(0)); in lpddr4_swffc()
113 val = mmio_read_32(DDRC_FREQ1_DERATEEN(0)); in lpddr4_swffc()
117 val = mmio_read_32(DDRC_FREQ2_DERATEEN(0)); in lpddr4_swffc()
131 val = mmio_read_32(DDRC_STAT(0)); in lpddr4_swffc()
140 val = mmio_read_32(DDRC_STAT(0)); in lpddr4_swffc()
148 val = mmio_read_32(DDRC_DBGCAM(0)); in lpddr4_swffc()
161 val = mmio_read_32(DDRC_STAT(0)); in lpddr4_swffc()
179 val = mmio_read_32(DDRC_RFSHCTL3(0)); in lpddr4_swffc()
186 val = mmio_read_32(DDRC_DFIMISC(0)); in lpddr4_swffc()
196 val = mmio_read_32(DDRC_DFISTAT(0)); in lpddr4_swffc()
207 val = mmio_read_32(DDRC_DFISTAT(0)); in lpddr4_swffc()
224 val = mmio_read_32(DDRC_STAT(0)); in lpddr4_swffc()
239 val = mmio_read_32(DDRC_DBGSTAT(0)); in lpddr4_swffc()
255 val = mmio_read_32(DDRC_SWSTAT(0)); in lpddr4_swffc()
264 val = mmio_read_32(DDRC_STAT(0)); in lpddr4_swffc()