106 	uint32_t reg0 = 0;  in acpu_dvfs_syspll_cfg()  local
142 		reg0 = read_reg_mask(ACPU_SC_CPU_STAT, 0x3, 20);  in acpu_dvfs_syspll_cfg()
147 	} while (clk_div_status != reg0);  in acpu_dvfs_syspll_cfg()
190 	unsigned int reg0 = 0;  in acpu_dvfs_freq_ascend()  local
225 		reg0 = read_reg_mask(PMCTRL_ACPUPLLSEL, 0x1,  in acpu_dvfs_freq_ascend()
231 	} while (reg0 != 0x1);  in acpu_dvfs_freq_ascend()
324 		reg0 = read_reg_mask(PMCTRL_ACPUDESTVOL, 0x7F,  in acpu_dvfs_freq_ascend()
334 	} while ((reg0 != reg1) || (reg2 != 0x1));  in acpu_dvfs_freq_ascend()
347 		reg0 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3,  in acpu_dvfs_freq_ascend()
358 		(reg0 != acpu_ddr_cfg_val) ||  in acpu_dvfs_freq_ascend()
379 		reg0 = read_reg_mask(PMCTRL_ACPUPLLSEL, 0x1,  in acpu_dvfs_freq_ascend()
385 	} while (reg0 != 0x1);  in acpu_dvfs_freq_ascend()
400 	unsigned int reg0 = 0;  in acpu_dvfs_freq_descend()  local
418 		reg0 = read_reg_mask(PMCTRL_ACPUPLLSEL, 0x1, 2);  in acpu_dvfs_freq_descend()
423 	} while (reg0 != 0x1);  in acpu_dvfs_freq_descend()
502 		reg0 = read_reg_mask(PMCTRL_ACPUPLLCTRL, 0x1,  in acpu_dvfs_freq_descend()
508 	} while (reg0 != 0x1);  in acpu_dvfs_freq_descend()
526 		reg0 = read_reg_mask(PMCTRL_ACPUPLLSEL, 0x1,  in acpu_dvfs_freq_descend()
532 	} while (reg0 != 0x1);  in acpu_dvfs_freq_descend()
553 		reg0 = read_reg_mask(ACPU_SC_CPU_STAT, 0x3,  in acpu_dvfs_freq_descend()
559 	} while (reg0 != 0x0);  in acpu_dvfs_freq_descend()
571 		reg0 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3,  in acpu_dvfs_freq_descend()
579 	} while ((reg0 != cpuext_cfg_val) || (reg1 != acpu_ddr_cfg_val));  in acpu_dvfs_freq_descend()
607 		reg0 = read_reg_mask(PMCTRL_ACPUDESTVOL, 0x7F,  in acpu_dvfs_freq_descend()
617 	} while ((reg0 != reg1) || (reg2 != 0x1));  in acpu_dvfs_freq_descend()