Lines Matching refs:smmu
97 #define ARM_SMMU_GR0(smmu) ((smmu)->base) argument
98 #define ARM_SMMU_GR1(smmu) ((smmu)->base + (1 << (smmu)->pgshift)) argument
137 #define ARM_SMMU_CB_BASE(smmu) ((smmu)->base + ((smmu)->size >> 1)) argument
138 #define ARM_SMMU_CB(smmu, n) ((n) * (1 << (smmu)->pgshift)) argument
306 static void arm_smmu_smr_cfg(struct arm_smmu_device *smmu, uint32_t index) in arm_smmu_smr_cfg() argument
308 uint32_t idx = smmu->cfg[index].cbndx; in arm_smmu_smr_cfg()
309 struct arm_smmu_smr *smr = &smmu->smr[index]; in arm_smmu_smr_cfg()
315 mmio_write_32((uintptr_t) (ARM_SMMU_GR0(smmu) + in arm_smmu_smr_cfg()
319 static void arm_smmu_s2cr_cfg(struct arm_smmu_device *smmu, uint32_t index) in arm_smmu_s2cr_cfg() argument
321 uint32_t idx = smmu->cfg[index].cbndx; in arm_smmu_s2cr_cfg()
322 struct arm_smmu_s2cr *s2cr = &smmu->s2cr[index]; in arm_smmu_s2cr_cfg()
328 mmio_write_32((uintptr_t) (ARM_SMMU_GR0(smmu) + in arm_smmu_s2cr_cfg()
332 static void smmu_set_pgtbl(struct arm_smmu_device *smmu, in smmu_set_pgtbl() argument
401 struct arm_smmu_device *smmu = &iommu; in arm_smmu_create_identity_map() local
409 smmu->base = (uint8_t *) SMMU_BASE; in arm_smmu_create_identity_map()
410 reg = mmio_read_32((uintptr_t) (ARM_SMMU_GR0(smmu) + ARM_SMMU_GR0_ID1)); in arm_smmu_create_identity_map()
411 smmu->pgshift = (reg & ID1_PAGESIZE) ? 16 : 12; in arm_smmu_create_identity_map()
412 smmu->size = ARM_SMMU_RES_SIZE; in arm_smmu_create_identity_map()
413 smmu->stream_ids = NULL; in arm_smmu_create_identity_map()
417 smmu->stream_ids = &paxc_stream_ids[0]; in arm_smmu_create_identity_map()
418 smmu->stream_ids_mask = &paxc_stream_ids_mask[0]; in arm_smmu_create_identity_map()
419 smmu->streams = ARRAY_SIZE(paxc_stream_ids); in arm_smmu_create_identity_map()
424 smmu->stream_ids = &crmu_stream_ids[0]; in arm_smmu_create_identity_map()
425 smmu->stream_ids_mask = &crmu_stream_ids_mask[0]; in arm_smmu_create_identity_map()
426 smmu->streams = ARRAY_SIZE(crmu_stream_ids); in arm_smmu_create_identity_map()
435 if (smmu->streams > NUM_OF_SMRS) { in arm_smmu_create_identity_map()
441 for (idx = 0; idx < smmu->streams; idx++) { in arm_smmu_create_identity_map()
443 smmu->s2cr[idx].type = S2CR_TYPE_TRANS; in arm_smmu_create_identity_map()
444 smmu->s2cr[idx].privcfg = S2CR_PRIVCFG_DEFAULT; in arm_smmu_create_identity_map()
445 smmu->s2cr[idx].cbndx = context_bank_index; in arm_smmu_create_identity_map()
446 smmu->cfg[idx].cbndx = context_bank_index; in arm_smmu_create_identity_map()
447 smmu->cfg[idx].cbar = STG1_WITH_STG2_BYPASS << CBAR_TYPE_SHIFT; in arm_smmu_create_identity_map()
448 arm_smmu_s2cr_cfg(smmu, idx); in arm_smmu_create_identity_map()
451 smmu->smr[idx].mask = smmu->stream_ids_mask[idx]; in arm_smmu_create_identity_map()
452 smmu->smr[idx].id = smmu->stream_ids[idx]; in arm_smmu_create_identity_map()
453 smmu->smr[idx].valid = 1; in arm_smmu_create_identity_map()
454 arm_smmu_smr_cfg(smmu, idx); in arm_smmu_create_identity_map()
457 mmio_write_32((uintptr_t) (ARM_SMMU_GR1(smmu) + in arm_smmu_create_identity_map()
458 ARM_SMMU_GR1_CBA2R(smmu->cfg[idx].cbndx)), in arm_smmu_create_identity_map()
461 reg = smmu->cfg[idx].cbar; in arm_smmu_create_identity_map()
465 mmio_write_32((uintptr_t) (ARM_SMMU_GR1(smmu) + in arm_smmu_create_identity_map()
466 ARM_SMMU_GR1_CBAR(smmu->cfg[idx].cbndx)), in arm_smmu_create_identity_map()
484 mmio_write_32((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
485 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
488 mmio_write_32((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
489 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
493 asid = smmu->cfg[idx].cbndx; in arm_smmu_create_identity_map()
497 mmio_write_64((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
498 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
504 mmio_write_64((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
505 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
518 mmio_write_32((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
519 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
524 mmio_write_32((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
525 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
531 mmio_write_32((uintptr_t) (ARM_SMMU_CB_BASE(smmu) + in arm_smmu_create_identity_map()
532 ARM_SMMU_CB(smmu, smmu->cfg[idx].cbndx) + in arm_smmu_create_identity_map()
535 smmu_set_pgtbl(smmu, dom, (uint64_t *)pg_table_base); in arm_smmu_create_identity_map()